Patents by Inventor Kirankumar KAMISETTY

Kirankumar KAMISETTY has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Stiffener and package substrate for a semiconductor package
    Patent number: 11295998
    Abstract: Techniques for fabricating a package substrate and/or a stiffener for a semiconductor package are described. For one technique, a package substrate comprises: a routing layer comprising a dielectric layer. A stiffener may be above the routing layer and a conductive line may be on the routing layer, the conductive line comprising first and second portions, the first portion having a first width, the second portion having a second width, the conductive line extending from a first region of the routing layer to a second region of the routing layer, the first region being under the stiffener, the second region being outside the stiffener, the first portion being on the first region, and the second portion being on the second region. One or more portions of the conductive line can be perpendicular to an edge of the stiffener. The perpendicular portion(s) may comprise a transition between the first and second widths.
    Type: Grant
    Filed: April 4, 2018
    Date of Patent: April 5, 2022
    Assignee: Intel Corporation
    Inventors: Stephen Christianson, Stephen Hall, Emile Davies-Venn, Dong-Ho Han, Kemal Aygun, Konika Ganguly, Jun Liao, M. Reza Zamani, Cory Mason, Kirankumar Kamisetty
  • STIFFENER AND PACKAGE SUBSTRATE FOR A SEMICONDUCTOR PACKAGE
    Publication number: 20190311963
    Abstract: Techniques for fabricating a package substrate and/or a stiffener for a semiconductor package are described. For one technique, a package substrate comprises: a routing layer comprising a dielectric layer. A stiffener may be above the routing layer and a conductive line may be on the routing layer, the conductive line comprising first and second portions, the first portion having a first width, the second portion having a second width, the conductive line extending from a first region of the routing layer to a second region of the routing layer, the first region being under the stiffener, the second region being outside the stiffener, the first portion being on the first region, and the second portion being on the second region. One or more portions of the conductive line can be perpendicular to an edge of the stiffener. The perpendicular portion(s) may comprise a transition between the first and second widths.
    Type: Application
    Filed: April 4, 2018
    Publication date: October 10, 2019
    Inventors: Stephen CHRISTIANSON, Stephen HALL, Emile DAVIES-VENN, Dong-Ho HAN, Kemal AYGUN, Konika GANGULY, Jun LIAO, M. Reza ZAMANI, Cory MASON, Kirankumar KAMISETTY