Patents by Inventor Kiranrao KUDUREGUNDI

Kiranrao KUDUREGUNDI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Integrated circuit having a periphery of input/output cells
    Patent number: 10892236
    Abstract: An integrated circuit, such as a flip chip, may be configured to increase the I/O cells by stacking the I/O cells in two or more rows with external high voltage circuits on opposite sides of a respective cell to reduce the distance between the rows. In addition, the integrated circuit may include a guard ring around the I/O cells to reduce signal noise interference generated by the external high voltage circuits in the I/O cells.
    Type: Grant
    Filed: April 30, 2019
    Date of Patent: January 12, 2021
    Assignee: QUALCOMM Incorporated
    Inventors: Sumeet Aggarwal, Kiranrao Kuduregundi
  • INTEGRATED CIRCUIT HAVING A PERIPHERY OF INPUT/OUTPUT CELLS
    Publication number: 20200350265
    Abstract: An integrated circuit, such as a flip chip, may be configured to increase the I/O cells by stacking the I/O cells in two or more rows with external high voltage circuits on opposite sides of a respective cell to reduce the distance between the rows. In addition, the integrated circuit may include a guard ring around the I/O cells to reduce signal noise interference generated by the external high voltage circuits in the I/O cells.
    Type: Application
    Filed: April 30, 2019
    Publication date: November 5, 2020
    Inventors: Sumeet AGGARWAL, Kiranrao KUDUREGUNDI