Patents by Inventor Kirby L. Watson

Kirby L. Watson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7853638
    Abstract: A design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a design for addressing deficiencies of the art in respect to hypertransport-based switching for multi-CPU systems and for flexibly configurable multi-CPU supported hypertransport switching is provided. The design structure can include a hypertransport switching data processing system. The system can include a CPU and at least two I/O bridges. Each I/O bridge can provide a communications path for data driven to a corresponding peripheral device from the CPU. Notably, the system can include a flexibly configurable hypertransport switch. The switch can include a first configuration adapting the CPU to both of the I/O bridges, and a second configuration adapting the CPU to a first one of the I/O bridges and a second CPU to a second one of the I/O bridges.
    Type: Grant
    Filed: June 18, 2008
    Date of Patent: December 14, 2010
    Assignee: International Business Machines Corporation
    Inventors: Lee H. Wilson, Kirby L. Watson, Vinh B. Lu, Mark W. Mueller, Daniel E. Hurlimann
  • Patent number: 7797475
    Abstract: Embodiments of the invention address deficiencies of the art in respect to hypertransport-based switching for multi-CPU systems and provide a method, system and computer program product for flexibly configurable multi-CPU supported hypertransport switching. In one embodiment of the invention, a hypertransport switching data processing system can be provided. The system can include a CPU and at least two I/O bridges. Each I/O bridge can provide a communications path for data driven to a corresponding peripheral device from the CPU. Notably, the system can include a flexibly configurable hypertransport switch. The switch can include a first configuration adapting the CPU to both of the I/O bridges, and a second configuration adapting the CPU to a first one of the I/O bridges and a second CPU to a second one of the I/O bridges.
    Type: Grant
    Filed: January 26, 2007
    Date of Patent: September 14, 2010
    Assignee: International Business Machines Corporation
    Inventors: Lee H. Wilson, Kirby L. Watson, Vinh B. Lu, Mark W. Mueller, Daniel E. Hurlimann
  • Publication number: 20080256222
    Abstract: A design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a design for addressing deficiencies of the art in respect to hypertransport-based switching for multi-CPU systems and for flexibly configurable multi-CPU supported hypertransport switching is provided. The design structure can include a hypertransport switching data processing system. The system can include a CPU and at least two I/O bridges. Each I/O bridge can provide a communications path for data driven to a corresponding peripheral device from the CPU. Notably, the system can include a flexibly configurable hypertransport switch. The switch can include a first configuration adapting the CPU to both of the I/O bridges, and a second configuration adapting the CPU to a first one of the I/O bridges and a second CPU to a second one of the I/O bridges.
    Type: Application
    Filed: June 18, 2008
    Publication date: October 16, 2008
    Inventors: Lee H. Wilson, Kirby L. Watson, Vinh B. Lu, Mark W. Mueller, Daniel E. Hurlimann
  • Publication number: 20080184021
    Abstract: Embodiments of the invention address deficiencies of the art in respect to hypertransport-based switching for multi-CPU systems and provide a method, system and computer program product for flexibly configurable multi-CPU supported hypertransport switching. In one embodiment of the invention, a hypertransport switching data processing system can be provided. The system can include a CPU and at least two I/O bridges. Each I/O bridge can provide a communications path for data driven to a corresponding peripheral device from the CPU. Notably, the system can include a flexibly configurable hypertransport switch. The switch can include a first configuration adapting the CPU to both of the I/O bridges, and a second configuration adapting the CPU to a first one of the I/O bridges and a second CPU to a second one of the I/O bridges.
    Type: Application
    Filed: January 26, 2007
    Publication date: July 31, 2008
    Inventors: Lee H. Wilson, Kirby L. Watson, Vinh B. Lu, Mark W. Mueller, Daniel E. Hurlimann