Abstract: Method and system to encrypt and decrypt data is provided. The method comprising, providing input data to be encrypted, said input data made up of a plurality of sub-data, each said sub-data comprising sequence of bits of data; dynamically selecting a plurality of invertible encryption parameters; and performing one or more rounds of a combination of data modification, sequence modification and data-sequence modification using plurality of selected encryption parameters deriving encrypted data. The system includes a processor for executing code for dynamically selecting a plurality of invertible encryption parameters.

Abstract: An method, apparatus and article of manufacture for detecting and correcting memory device failures includig detecting errors in data stored in a memory device from the data transacted with a processor, correcting the detected errors in the data transacted with the processor, tracking the detected errors in the memory device, determining when the memory device has failed based upon the tracked detected errors and resetting the memory device when the memory device fails testing, and further, identifying erroneous latch-ups detected soon after powering and correcting errors such that no erroneous data is transacted with the processor.

Abstract: An analog-to-digital converter system for sampling an input signal includes at least one offset channel. Each channel includes a differential amplifier with a signal input coupled to the input signal, an offset input for receiving an offset signal and an amplified difference output, an analog-to-digital converter having a signal input coupled to the amplified difference output and having a signal output, and an offset index signal source coupled to the differential amplifier offset input. The system further includes an offset controller having at least one output coupled to a corresponding at least one offset index signal source and at least one input coupled to a corresponding at least one analog-to-digital converter signal output. The system also includes a signal constructor having at least one input coupled to a corresponding at least one analog-to-digital converter signal output and operable to provide a relatively high resolution digital output signal.

Abstract: An method, apparatus and article of manufacture for detecting and correcting memory device failures is disclosed. The exemplary method comprises detecting errors in data stored in a memory device from the data transacted with a processor, correcting the detected errors in the data transacted with the processor, tracking the detected errors in the memory device, determining when the memory device has failed based upon the tracked detected errors and resetting the memory device when the memory device fails testing. The invention also identifies erroneous latchups as latchups detected soon after powering. Errors are corrected such that no erroneous data is transacted with the processor.

Abstract: Methods including a Kalman filter tracking method for localizing a magnetic field source and which employs a linear perturbation method. The linear perturbation method linearizes an objective function in the neighborhood of the actual source enabling the source location to be computed in a single operation. Successive applications of the linear perturbation method lead to successive improvements in the localization result.

Abstract: A magnetic object tracking algorithm, that may be implemented as an apparatus or a method, that permits kinematic tracking of magnetized objects, or targets, using magnetic field strength measurements derived from one or more vector magnetometers. The magnetic object tracking algorithm effectively tracks a maneuvering magnetic dipole target using an extended Kalman filter directly observing (processing) real magnetic field strength data.

Abstract: An improved digital fluxgate magnetometer that uses digital logic and a high resolution digital to analog converter to digitize a magnetic signal for use by signal processing algorithms. The magnetometer includes an oscillator that outputs an oscillator signal and a magnetic fluxgate sensor having a drive coil coupled to the oscillator, a feedback coil, and a sense coil. An analog multiplier is coupled to the sense coil and the oscillator and outputs a signal to an analog low pass filter. A comparator is coupled to the analog multiplier, and a register is coupled to the comparator and outputs a logical 1 or a logical 0 in accordance with the output of the comparator. A digital filter receives the output of the register and produces a digital output of the digital fluxgate magnetometer. A high resolution digital to analog converter is coupled between the register and the feedback coil of the magnetic fluxgate sensor in a feedback loop of the sensor.

Abstract: A target's magnetic dipole includes both a permanent component and an induced component that is caused by the interaction of the target at a given heading with the ambient magnetic field. In order to accurately classify targets, a library of characterization matrices is built for a plurality of candidate targets. The matrices characterize what the magnetic dipoles would be in a given ambient magnetic field at a particular heading. In practice, some localization algorithm is used to provide a target's magnetic dipole and heading. Magnetic dipoles for each of the candidate targets are predicted using the target's heading, the ambient magnetic field, and the characterization matrices. The target is then classified as the candidate target(s) providing the best match to the target's measured magnetic dipole.

Abstract: A method of gate reduction in a gate width limited logic array. Common sub-groups of inputs associated with an array output are collected. Logical functions are then reimplemented, using the common subgroups implemented as single gates resulting in an implementation of the logical functions that uses few active devices. The method uses a constraint typically placed on gate array logic that gates wider than four inputs cannot be used. The method is applicable to combinatorial digital logic devices only. The method of the present invention is applicable to large scale integration (LSI) and very large scale integration (VLSI) integrated circuit devices.