Patents by Inventor Kirsten E. Moselund

Kirsten E. Moselund has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11183559
    Abstract: A method for manufacturing a semiconductor structure comprises the steps of: providing a substrate including a first semiconductor material; forming a dielectric layer on a surface of the substrate; forming an opening in the dielectric layer having a bottom reaching the substrate; providing a second semiconductor material in the opening and on the substrate, the second semiconductor material being en-capsulated by a further dielectric material thereby forming a filled cavity; melting the second semiconductor material in the cavity; recrystallizing the second semi-conductor material in the cavity; laterally removing the second semiconductor material at least partially for forming a lateral surface at the second semiconductor material; and forming a third semiconductor material on the lateral surface of the second semiconductor material, wherein the third semiconductor material is different from the second semiconductor material.
    Type: Grant
    Filed: August 11, 2017
    Date of Patent: November 23, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Mattias B. Borg, Kirsten E. Moselund, Heike E. Riel, Heinz Schmid
  • Patent number: 10411092
    Abstract: A method comprises providing a cavity structure on the substrate comprising a first growth channel extending in a first direction, a second growth channel extending in a second direction, wherein the second direction is different from the first direction and the second channel is connected to the first channel at a channel junction, a first seed surface in the first channel, at least one opening for supplying precursor materials to the cavity structure, selectively growing from the first seed surface a first semiconductor structure substantially only in the first direction and in the first channel, thereby forming a second seed surface for a second semiconductor structure at the channel junction, growing in the second channel the second semiconductor structure in the second direction from the second seed surface, thereby forming the semiconductor junction comprising the first and the second semiconductor structure.
    Type: Grant
    Filed: February 28, 2017
    Date of Patent: September 10, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Mattias B. Borg, Kirsten E. Moselund, Heike E. Riel, Heinz Schmid
  • Publication number: 20170365660
    Abstract: A method for manufacturing a semiconductor structure comprises the steps of: providing a substrate including a first semiconductor material; forming a dielectric layer on a surface of the substrate; forming an opening in the dielectric layer having a bottom reaching the substrate; providing a second semiconductor material in the opening and on the substrate, the second semiconductor material being en-capsulated by a further dielectric material thereby forming a filled cavity; melting the second semiconductor material in the cavity; recrystallizing the second semi-conductor material in the cavity; laterally removing the second semiconductor material at least partially for forming a lateral surface at the second semiconductor material; and forming a third semiconductor material on the lateral surface of the second semiconductor material, wherein the third semiconductor material is different from the second semiconductor material.
    Type: Application
    Filed: August 11, 2017
    Publication date: December 21, 2017
    Inventors: Mattias B. BORG, Kirsten E. MOSELUND, Heike E. RIEL, Heinz SCHMID
  • Patent number: 9768251
    Abstract: A method for manufacturing a semiconductor structure comprises the steps of: providing a substrate including a first semiconductor material; forming a dielectric layer on a surface of the substrate; forming an opening in the dielectric layer having a bottom reaching the substrate; providing a second semiconductor material in the opening and on the substrate, the second semiconductor material being en-capsulated by a further dielectric material thereby forming a filled cavity; melting the second semiconductor material in the cavity; recrystallizing the second semi-conductor material in the cavity; laterally removing the second semiconductor material at least partially for forming a lateral surface at the second semiconductor material; and forming a third semiconductor material on the lateral surface of the second semiconductor material, wherein the third semiconductor material is different from the second semiconductor material.
    Type: Grant
    Filed: November 20, 2015
    Date of Patent: September 19, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Mattias B. Borg, Kirsten E. Moselund, Heike E. Riel, Heinz Schmid
  • Publication number: 20170170271
    Abstract: A method comprises providing a cavity structure on the substrate comprising a first growth channel extending in a first direction, a second growth channel extending in a second direction, wherein the second direction is different from the first direction and the second channel is connected to the first channel at a channel junction, a first seed surface in the first channel, at least one opening for supplying precursor materials to the cavity structure, selectively growing from the first seed surface a first semiconductor structure substantially only in the first direction and in the first channel, thereby forming a second seed surface for a second semiconductor structure at the channel junction, growing in the second channel the second semiconductor structure in the second direction from the second seed surface, thereby forming the semiconductor junction comprising the first and the second semiconductor structure.
    Type: Application
    Filed: February 28, 2017
    Publication date: June 15, 2017
    Inventors: MATTIAS B. BORG, KIRSTEN E. MOSELUND, HEIKE E. RIEL, HEINZ SCHMID
  • Patent number: 9620360
    Abstract: A method comprises providing a cavity structure on the substrate comprising a first growth channel extending in a first direction, a second growth channel extending in a second direction, wherein the second direction is different from the first direction and the second channel is connected to the first channel at a channel junction, a first seed surface in the first channel, at least one opening for supplying precursor materials to the cavity structure, selectively growing from the first seed surface a first semiconductor structure substantially only in the first direction and in the first channel, thereby forming a second seed surface for a second semiconductor structure at the channel junction, growing in the second channel the second semiconductor structure in the second direction from the second seed surface, thereby forming the semiconductor junction comprising the first and the second semiconductor structure.
    Type: Grant
    Filed: November 27, 2015
    Date of Patent: April 11, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Mattias B. Borg, Kirsten E. Moselund, Heike E. Riel, Heinz Schmid
  • Publication number: 20160155798
    Abstract: A method for manufacturing a semiconductor structure comprises the steps of: providing a substrate including a first semiconductor material; forming a dielectric layer on a surface of the substrate; forming an opening in the dielectric layer having a bottom reaching the substrate; providing a second semiconductor material in the opening and on the substrate, the second semiconductor material being en-capsulated by a further dielectric material thereby forming a filled cavity; melting the second semiconductor material in the cavity; recrystallizing the second semi-conductor material in the cavity; laterally removing the second semiconductor material at least partially for forming a lateral surface at the second semiconductor material; and forming a third semiconductor material on the lateral surface of the second semiconductor material, wherein the third semiconductor material is different from the second semiconductor material.
    Type: Application
    Filed: November 20, 2015
    Publication date: June 2, 2016
    Inventors: MATTIAS B. BORG, KIRSTEN E. MOSELUND, HEIKE E. RIEL, HEINZ SCHMID
  • Patent number: 9293467
    Abstract: A tunnel field-effect transistor (TFET) device includes first and second semiconductor contact regions separated by a semiconductor channel region; a channel gate overlying the channel region; and first and second doping gates overlying the first and second contact regions respectively; wherein application of a positive voltage level at the first doping gate and a negative voltage level at the second doping gate produces an n-type first contact region and a p-type second contact region, and reversing the voltage levels at the doping gates produces a p-type first contact region and an n-type second contact region.
    Type: Grant
    Filed: September 18, 2014
    Date of Patent: March 22, 2016
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Kirsten E. Moselund, Heike E. Riel
  • Publication number: 20150090959
    Abstract: A tunnel field-effect transistor (TFET) device includes first and second semiconductor contact regions separated by a semiconductor channel region; a channel gate overlying the channel region; and first and second doping gates overlying the first and second contact regions respectively; wherein application of a positive voltage level at the first doping gate and a negative voltage level at the second doping gate produces an n-type first contact region and a p-type second contact region, and reversing the voltage levels at the doping gates produces a p-type first contact region and an n-type second contact region.
    Type: Application
    Filed: September 18, 2014
    Publication date: April 2, 2015
    Inventors: Kirsten E. Moselund, Heike E. Riel