Patents by Inventor Kishalay DATTA

Kishalay DATTA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11809206
    Abstract: An example apparatus includes: a compensation circuit including: a current compensation output, a first transistor with a first current terminal and a first control terminal, the first current terminal coupled to the current compensation output, and a resistor ladder with a tap terminal coupled to the first control terminal, a current mirror circuit having a mirror input and a mirror output, the mirror input coupled to the current compensation output, and a rectification circuit having an input coupled to the mirror output.
    Type: Grant
    Filed: August 26, 2021
    Date of Patent: November 7, 2023
    Assignee: Texas Instruments Incorporated
    Inventors: Kishalay Datta, Anant Shankar Kamath, Kumar Anurag Shrivastava, Swaminathan Sankaran
  • Patent number: 11671138
    Abstract: In described examples, an integrated circuit includes an on-off keying (OOK) digital isolator, which includes a first circuitry, a multiplexer, an OOK modulator, an isolation barrier, an OOK envelope detector, and a second circuitry. The first circuitry generates and outputs a calibration signal. The multiplexer has a data signal input, and an input coupled to a first circuitry output. An OOK modulator input is coupled to a multiplexer output. An isolation barrier input is coupled to an OOK modulator output. An OOK envelope detector input is coupled to an isolation barrier output. The second circuitry includes an input coupled to an OOK envelope detector output, and an output coupled to an OOK envelope detector control input. The second circuitry detects a duty cycle distortion (DCD) of the OOK envelope detector output, and outputs a control signal to change the OOK envelope detector output's duty cycle based on the detected DCD.
    Type: Grant
    Filed: September 29, 2021
    Date of Patent: June 6, 2023
    Assignee: Texas Instruments Incorporated
    Inventors: RR Manikandan, Kumar Anurag Shrivastava, Robert Floyd Payne, Anant Shankar Kamath, Swaminathan Sankaran, Kishalay Datta, Siraj Akhtar, Mark Edward Wentroble, Suvadip Banerjee, Rakesh Hariharan, Gurumurti Kailaschandra Avhad
  • Publication number: 20230069663
    Abstract: An example apparatus includes: a compensation circuit including: a current compensation output, a first transistor with a first current terminal and a first control terminal, the first current terminal coupled to the current compensation output, and a resistor ladder with a tap terminal coupled to the first control terminal, a current mirror circuit having a mirror input and a mirror output, the mirror input coupled to the current compensation output, and a rectification circuit having an input coupled to the mirror output.
    Type: Application
    Filed: August 26, 2021
    Publication date: March 2, 2023
    Inventors: Kishalay Datta, Anant Shankar Kamath, Kumar Anurag Shrivastava, Swaminathan Sankaran
  • Publication number: 20230025757
    Abstract: In described examples, an integrated circuit includes an on-off keying (OOK) digital isolator, which includes a first circuitry, a multiplexer, an OOK modulator, an isolation barrier, an OOK envelope detector, and a second circuitry. The first circuitry generates and outputs a calibration signal. The multiplexer has a data signal input, and an input coupled to a first circuitry output. An OOK modulator input is coupled to a multiplexer output. An isolation barrier input is coupled to an OOK modulator output. An OOK envelope detector input is coupled to an isolation barrier output. The second circuitry includes an input coupled to an OOK envelope detector output, and an output coupled to an OOK envelope detector control input. The second circuitry detects a duty cycle distortion (DCD) of the OOK envelope detector output, and outputs a control signal to change the OOK envelope detector output's duty cycle based on the detected DCD.
    Type: Application
    Filed: September 29, 2021
    Publication date: January 26, 2023
    Inventors: RR Manikandan, Kumar Anurag Shrivastava, Robert Floyd Payne, Anant Shankar Kamath, Swaminathan Sankaran, Kishalay Datta, Siraj Akhtar, Mark Edward Wentroble, Suvadip Banerjee, Rakesh Hariharan, Gurumurti Kailaschandra Avhad
  • Patent number: 11283345
    Abstract: In some examples, a voltage regulator includes a first pair of switches controllable by a first clock signal having a first phase. The switches in the first pair are coupled to each other via a capacitor. The voltage regulator also includes a second pair of switches controllable by a second clock signal having a second phase. The first and second phases are non-overlapping. The switches in the second pair are coupled to each other via the capacitor.
    Type: Grant
    Filed: April 12, 2021
    Date of Patent: March 22, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Kishalay Datta, Vinod Menezes
  • Publication number: 20210234456
    Abstract: In some examples, a voltage regulator includes a first pair of switches controllable by a first clock signal having a first phase. The switches in the first pair are coupled to each other via a capacitor. The voltage regulator also includes a second pair of switches controllable by a second clock signal having a second phase. The first and second phases are non-overlapping. The switches in the second pair are coupled to each other via the capacitor.
    Type: Application
    Filed: April 12, 2021
    Publication date: July 29, 2021
    Inventors: Kishalay Datta, Vinod Menezes
  • Patent number: 10978944
    Abstract: In some examples, a voltage regulator includes a first pair of switches controllable by a first clock signal having a first phase. The switches in the first pair are coupled to each other via a capacitor. The voltage regulator also includes a second pair of switches controllable by a second clock signal having a second phase. The first and second phases are non-overlapping. The switches in the second pair are coupled to each other via the capacitor.
    Type: Grant
    Filed: July 19, 2018
    Date of Patent: April 13, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Kishalay Datta, Vinod Menezes
  • Publication number: 20190028018
    Abstract: In some examples, a voltage regulator includes a first pair of switches controllable by a first clock signal having a first phase. The switches in the first pair are coupled to each other via a capacitor. The voltage regulator also includes a second pair of switches controllable by a second clock signal having a second phase. The first and second phases are non-overlapping. The switches in the second pair are coupled to each other via the capacitor.
    Type: Application
    Filed: July 19, 2018
    Publication date: January 24, 2019
    Inventors: Kishalay DATTA, Vinod MENEZES