Patents by Inventor Kishore K. Mishra

Kishore K. Mishra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Mechanisms for converting address and data signals to interrupt message signals
    Patent number: 6374321
    Abstract: In some embodiments, the invention includes an apparatus including a host bridge coupled to a processor bus. The apparatus also includes an I/O bridge coupled to the host bridge, the I/O bridge including ports to receive an interrupt request signal in the form of address signals and data signals. Decode logic receives at least some of the address signals and data signals and to provide a decoded signal responsive thereto. A redirection table includes a send pending bit that is set responsive to the decoded signal.
    Type: Grant
    Filed: October 27, 1999
    Date of Patent: April 16, 2002
    Assignee: Intel Corporation
    Inventors: Stephen S. Pawlowski, Darren L. Abramson, David I. Poisner, Kishore K. Mishra
  • MECHANISMS FOR CONVERTING ADDRESS AND DATA SIGNALS TO INTERRUPT MESSAGE SIGNALS
    Publication number: 20010032285
    Abstract: In some embodiments, the invention includes an apparatus including a host bridge coupled to a processor bus. The apparatus also includes an I/O bridge coupled to the host bridge, the I/O bridge including ports to receive an interrupt request signal in the form of address signals and data signals. Decode logic receives at least some of the address signals and data signals and to provide a decoded signal responsive thereto. A redirection table includes a send pending bit that is set responsive to the decoded signal.
    Type: Application
    Filed: October 27, 1999
    Publication date: October 18, 2001
    Inventors: STEPHEN S. PAWLOWSKI, DARREN L. ABRAMSON, DAVID I. POISNER, KISHORE K. MISHRA