Patents by Inventor Kishore Kaniyar Sampathkumar

Kishore Kaniyar Sampathkumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190188156
    Abstract: Implementations described herein provide a storage system including a cache, such as a solid-state cache or other relatively higher speed memory cache, and a disc array or relatively higher capacity mass data store. As the storage system receives write requests from a host device, the data of the write requests is initially written to the cache. Eventually, such data is committed to the mass data store in a flushing process. A flushing manager selects data blocks from the cache to flush to the mass data store. The flushing manager selects a sequence of data blocks that are contiguously stored on the mass data store such as to increase performance for I/O operations in the mass data store. The flushing manager utilizes a data structure, such as a binary search tree, to identify the contiguous data blocks to flush.
    Type: Application
    Filed: December 19, 2017
    Publication date: June 20, 2019
    Inventors: Kishore Kaniyar Sampathkumar, Vipin Kumar Verma
  • Patent number: 10191855
    Abstract: Systems and methods presented herein provide for simulated NVDRAM operations. In a host system, a host memory is sectioned into pages. An HBA in the host system comprises a DRAM and an SSD. The DRAM and the SSD are also sectioned into pages and mapped to pages of the host memory. A host processor is operable to generate Input/Output (I/O) requests. An HBA driver is operable to process the I/O requests. The HBA driver is also operable to detect when the pages of the DRAM are accessed, to determine a rate of page reclamation based on the detection, and to reclaim pages of data in the DRAM by moving pages of data from the DRAM into the pages of the SSD based on the determined rate of page reclamation.
    Type: Grant
    Filed: July 16, 2014
    Date of Patent: January 29, 2019
    Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
    Inventors: Kishore Kaniyar Sampathkumar, Saugata Das Purkayastha
  • Patent number: 9747228
    Abstract: Systems and methods presented herein provide for simulated NVDRAM operations. In a host system, a host memory is sectioned into pages. An HBA in the host system comprises a DRAM and an SSD for cache operations. The DRAM and the SSD are sectioned into pages and mapped to pages of the host memory. The SSD is further sectioned into regions comprising one or more pages of the SSD. AnHBA driver is operable to load a page of data from the SSD into a page of the DRAM when directed by a host processor, to determine that the page of the DRAM is occupied with other data, to determine a priority of the region of the page of other data occupying the page of the DRAM, and to flush the other data from the DRAM to the SSD based on the determined priority.
    Type: Grant
    Filed: July 3, 2014
    Date of Patent: August 29, 2017
    Assignee: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
    Inventors: Saugata Das Purkayastha, Kishore Kaniyar Sampathkumar
  • Patent number: 9734062
    Abstract: An apparatus comprising a memory and a controller. The memory may be configured to (i) implement a cache and (ii) store meta-data. The cache comprises one or more cache windows. Each of the one or more cache windows comprises a plurality of cache-lines configured to store information. Each of the cache-lines comprises a plurality of sub-cache lines. Each of the plurality of cache-lines and each of the plurality of sub-cache lines is associated with meta-data indicating one or more of a dirty state and an invalid state. The controller is connected to the memory and configured to (i) recognize sub-cache line boundaries and (ii) process the I/O requests in multiples of a size of said sub-cache lines to minimize cache-fills.
    Type: Grant
    Filed: December 18, 2013
    Date of Patent: August 15, 2017
    Assignee: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
    Inventors: Saugata Das Purkayastha, Luca Bert, Horia Simionescu, Kishore Kaniyar Sampathkumar, Mark Ish
  • Patent number: 9715455
    Abstract: An apparatus having an interface and a circuit is shown. The interface is configured to receive a request to access a memory. The request includes a hint. The circuit is configured to select a current one of a plurality of cache policies based on the hint. The current cache policy includes a number of current parameters ranging from some to all of a plurality of management parameters of a cache device. The circuit is further configured to cache data of the request based on the current cache policy.
    Type: Grant
    Filed: May 20, 2014
    Date of Patent: July 25, 2017
    Assignee: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
    Inventors: Saugata Das Purkayastha, Kishore Kaniyar Sampathkumar
  • Patent number: 9378152
    Abstract: A storage subsystem can achieve more efficient I/O processing by enabling users to specify and pass out of band I/O hints comprising an object to be hinted, a hint type, and caching strategies associated with a hint type. A hinted object may be either a virtual device or a file. In addition to priority cache, hint types may include never-cache, sticky-cache, and volatile-cache. Hints may be passed via command-line or graphical-user interfaces.
    Type: Grant
    Filed: May 9, 2014
    Date of Patent: June 28, 2016
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Kishore Kaniyar Sampathkumar, Parag Maharana, Sumanesh Samanta, Saugata Das Purkayastha
  • Patent number: 9239679
    Abstract: An apparatus comprising a memory and a controller. The memory may be configured to (i) implement a cache and (ii) store meta-data. The cache may comprise one or more cache windows. Each of the one or more cache windows comprises a plurality of cache-lines configured to store information. The controller is connected to the memory and configured to (A) process normal read/write operations in a first mode and (B) process special read/write operations in a second mode by (i) tracking a write followed by read condition on each of said cache windows and (ii) discarding data on the cache-lines associated with the cache windows after completion of the write followed by a read condition on the cache-lines.
    Type: Grant
    Filed: January 1, 2014
    Date of Patent: January 19, 2016
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Kishore Kaniyar Sampathkumar, Saugata Das Purkayastha, Parag R. Maharana
  • Publication number: 20160004653
    Abstract: Systems and methods presented herein provide for simulated NVDRAM operations. In a host system, a host memory is sectioned into pages. An HBA in the host system comprises a DRAM and an SSD for cache operations. The DRAM and the SSD are sectioned into pages and mapped to pages of the host memory. The SSD is further sectioned into regions comprising one or more pages of the SSD. The HBA is operable to load a page of data from the SSD into a page of the DRAM when directed by a host processor, to determine that the page of the DRAM is occupied with other data, to determine a priority of the region of the page of other data occupying the page of the DRAM, and to flush the other data from the DRAM to the SSD based on the determined priority.
    Type: Application
    Filed: July 3, 2014
    Publication date: January 7, 2016
    Inventors: Saugata Das Purkayastha, Kishore Kaniyar Sampathkumar
  • Publication number: 20160004465
    Abstract: Systems and methods presented herein provide for simulated NVDRAM operations. In a host system, a host memory is sectioned into pages. An HBA in the host system comprises a DRAM and an SSD. The DRAM and the SSD are also sectioned into pages and mapped to pages of the host memory. A host processor is operable to generate Input/Output (I/O) requests. An HBA driver is operable to process the I/O requests. The HBA driver is also operable to detect when the pages of the DRAM are accessed, to determine a rate of page reclamation based on the detection, and to reclaim pages of data in the DRAM by moving pages of data from the DRAM into the pages of the SSD based on the determined rate of page reclamation.
    Type: Application
    Filed: July 16, 2014
    Publication date: January 7, 2016
    Inventors: Kishore Kaniyar Sampathkumar, Saugata Das Purkayastha
  • Publication number: 20150324300
    Abstract: A storage subsystem can achieve more efficient I/O processing by enabling users to specify and pass out of band I/O hints comprising an object to be hinted, a hint type, and caching strategies associated with a hint type. A hinted object may be either a virtual device or a file. In addition to priority cache, hint types may include never-cache, sticky-cache, and volatile-cache. Hints may be passed via command-line or graphical-user interfaces.
    Type: Application
    Filed: May 9, 2014
    Publication date: November 12, 2015
    Applicant: LSI CORPORATION
    Inventors: Kishore Kaniyar Sampathkumar, Parag Maharana, Sumanesh Samanta, Saugata Das Purkayastha
  • Publication number: 20150178201
    Abstract: An apparatus comprising a memory and a controller. The memory may be configured to (i) implement a cache and (ii) store meta-data. The cache may comprise one or more cache windows. Each of the one or more cache windows comprises a plurality of cache-lines configured to store information. The controller is connected to the memory and configured to (A) process normal read/write operations in a first mode and (B) process special read/write operations in a second mode by (i) tracking a write followed by read condition on each of said cache windows and (ii) discarding data on the cache-lines associated with the cache windows after completion of the write followed by a read condition on the cache-lines.
    Type: Application
    Filed: January 1, 2014
    Publication date: June 25, 2015
    Applicant: LSI Corporation
    Inventors: Kishore Kaniyar Sampathkumar, Saugata Das Purkayastha, Parag R. Maharana
  • Publication number: 20150169458
    Abstract: An apparatus comprising a memory and a controller. The memory may be configured to (i) implement a cache and (ii) store meta-data. The cache comprises one or more cache windows. Each of the one or more cache windows comprises a plurality of cache-lines configured to store information. Each of the cache-lines comprises a plurality of sub-cache lines. Each of the plurality of cache-lines and each of the plurality of sub-cache lines is associated with meta-data indicating one or more of a dirty state and an invalid state. The controller is connected to the memory and configured to (i) recognize sub-cache line boundaries and (ii) process the I/O requests in multiples of a size of said sub-cache lines to minimize cache-fills.
    Type: Application
    Filed: December 18, 2013
    Publication date: June 18, 2015
    Applicant: LSI Corporation
    Inventors: Saugata Das Purkayastha, Luca Bert, Horia Simionescu, Kishore Kaniyar Sampathkumar, Mark Ish
  • Patent number: 9037538
    Abstract: A method to perform file system migration is described. The method comprises associating a source block device to a destination block device, wherein the source block device and the destination block device include a plurality of source blocks and destination blocks, respectively. At least one command for a source block from the plurality of source blocks is directed to the source block device or the destination block device based at least on the associating. Further, a destination block from the plurality of destination blocks is updated based, in part, on the at least one directed command.
    Type: Grant
    Filed: May 13, 2010
    Date of Patent: May 19, 2015
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Kishore Kaniyar Sampathkumar
  • Publication number: 20150074355
    Abstract: An apparatus includes a memory and a controller. The memory may be configured to implement a cache and store meta-data. The cache generally comprises one or more cache windows. Each of the one or more cache windows comprises a plurality of cache-lines configured to store information. Each of the plurality of cache-lines is associated with meta-data indicating one or more of a dirty state, an invalid state, and a partially dirty state. The controller is connected to the memory and may be configured to (i) detect an input/output (I/O) operation directed to a file system recovery log area, (ii) mark a corresponding I/O using a predefined hint value, and (iii) pass the corresponding I/O along with the predefined hint value to a caching layer.
    Type: Application
    Filed: October 30, 2013
    Publication date: March 12, 2015
    Applicant: LSI Corporation
    Inventors: Kishore Kaniyar Sampathkumar, Saugata Das Purkayastha
  • Patent number: 8615641
    Abstract: A method and system for differential backup of a logical disk of a data storage array is presented. The system comprises: a pool of physical storage space divided into a plurality of addressable memory locations; and a logical disk adapted to store metadata associated with a differential snapshot of the logical disk. The metadata comprises a mapping structure defining a sharing relationship between the differential snapshot of the logical disk and a previous snapshot of the logical disk that is arranged to serve as a baseline snapshot of the logical disk. The mapping structure is adapted to indicate disk regions of the logical disk that have changed in the differential snapshot of the logical disk with reference to the baseline snapshot of the logical disk.
    Type: Grant
    Filed: June 24, 2009
    Date of Patent: December 24, 2013
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Kishore Kaniyar Sampathkumar
  • Publication number: 20130054520
    Abstract: A method to perform file system migration is described. The method comprises associating a source block device to a destination block device, wherein the source block device and the destination block device include a plurality of source blocks and destination blocks, respectively. At least one command for a source block from the plurality of source blocks is directed to the source block device or the destination block device based at least on the associating. Further, a destination block from the plurality of destination blocks is updated based, in part, on the at least one directed command.
    Type: Application
    Filed: May 13, 2010
    Publication date: February 28, 2013
    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
    Inventor: Kishore Kaniyar Sampathkumar
  • Patent number: 7937548
    Abstract: A system and method of creating a snapclone for on-line point-in-time complete backup in a virtualized storage system is disclosed. In one embodiment, a method for creating a snapclone for on-line point-in-time complete backup in a virtualized storage system includes receiving a copy operation directed to one or more identified segments of an original virtual disk, in response to the copy operation, substantially sequentially copying the one or more identified segments to a snapclone virtual disk, clearing bits in an in-memory sharing bitmap associated with already copied one or more identified segments, and writing the cleared bits in the in-memory sharing bitmap to a disk resident virtual disk metadata associated with the snapclone virtual disk upon receiving a current write I/O operation while the copy operation is in progress. The received current write I/O operation is targeting data outside the LBA range of the already copied one or more identified segments.
    Type: Grant
    Filed: July 3, 2008
    Date of Patent: May 3, 2011
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Kishore Kaniyar Sampathkumar
  • Publication number: 20110093437
    Abstract: A method and system for generating a snapshot of one or more logical disks storing file-system data associated with a file system are disclosed. In one embodiment, the file system is quiesced upon a receipt of a command to generate the snapshot of the logical disks, where the snapshot is a copy of the logical disks at a point in time. Then, a disk usage of the logical disks at the point in time is determined. Further, a sharing bitmap associated with the snapshot is generated based on the disk usage, where the sharing bitmap is configured to indicate sharing of the file-system data with the logical disks and a predecessor snapshot immediately preceding the snapshot. Moreover, the file system is unquiesced.
    Type: Application
    Filed: January 18, 2010
    Publication date: April 21, 2011
    Inventor: Kishore Kaniyar SAMPATHKUMAR
  • Publication number: 20100287348
    Abstract: A method and system for differential backup of a logical disk of a data storage array is presented. The system comprises: a pool of physical storage space divided into a plurality of addressable memory locations; and a logical disk adapted to store metadata associated with a differential snapshot of the logical disk. The metadata comprises a mapping structure defining a sharing relationship between the differential snapshot of the logical disk and a previous snapshot of the logical disk that is arranged to serve as a baseline snapshot of the logical disk. The mapping structure is adapted to indicate disk regions of the logical disk that have changed in the differential snapshot of the logical disk with reference to the baseline snapshot of the logical disk.
    Type: Application
    Filed: June 24, 2009
    Publication date: November 11, 2010
    Inventor: Kishore Kaniyar SAMPATHKUMAR
  • Patent number: 7831750
    Abstract: A method, apparatus and software is disclosed for processing input/output (I/O) requests for a mirrored storage volume in recovery mode in which the processing of normal I/O is optimised using the recovery map for the volume.
    Type: Grant
    Filed: January 29, 2008
    Date of Patent: November 9, 2010
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Kishore Kaniyar Sampathkumar