Patents by Inventor Kitrick Sheets

Kitrick Sheets has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120005685
    Abstract: System and method are proposed for intelligent assignment of submitted information processing jobs to computing resources in an information processing grid based upon real-time measurements of job behavior and predictive analysis of job throughput and computing resource consumption of the correspondingly generated workloads. The job throughput and computing resource utilization are measured and analyzed in multiple parametric dimensions. The analyzed workload may work with a job scheduling system to provide optimized job dispatchment to computing resources across the grid. Application of a parametric weighting system to the parametric dimensions makes the optimization system dynamic and flexible. Through adjustment of these parametric weights, the focus of the optimization can be adjusted dynamically to support the immediate operational goals of the system as a whole.
    Type: Application
    Filed: June 28, 2011
    Publication date: January 5, 2012
    Inventors: Steve S. Chen, Kitrick Sheets, Peter Marosan
  • Patent number: 7577816
    Abstract: The present invention provides a method of initializing shared memory in a multinode system. The method includes building a local address space in each of a plurality of nodes and exporting the local address space from each of the plurality of nodes to a Remote Translation Table (RTT) in each of the plurality of nodes. The present invention further provides system including a plurality of nodes, each node having one or more processors and a memory controller operatively coupled to the one or more processors, wherein the memory controller includes a RTT for holding translation information for an entire virtual memory address space for the node, further wherein the RTT is initialized upon the start of a process by building a local address space in the node, and exporting the local address space from the node to a RTT in each of the plurality of other nodes.
    Type: Grant
    Filed: August 18, 2003
    Date of Patent: August 18, 2009
    Assignee: Cray Inc.
    Inventors: Kitrick Sheets, Andrew B. Hastings
  • Patent number: 7529906
    Abstract: Systems and methods include translating a virtual memory address into a physical memory address in a multi-node system that is initiated by providing the virtual memory address at a source node. A determination is made that a translation for the virtual memory address does not exist. A physical node to query is determined based on the virtual memory address. An emulated remote translation table (ERTT) segment is queried on the determined physical node to see if the ERTT segment may provide a translation. If the translation is received then the translation may be loaded into a TLB on the source node. Otherwise a memory reference error may be generated for the entity or application referencing the invalid virtual memory address.
    Type: Grant
    Filed: August 18, 2003
    Date of Patent: May 5, 2009
    Assignee: Cray Incorporated
    Inventor: Kitrick Sheets
  • Patent number: 7503048
    Abstract: Systems and methods for scheduling program units that are part of a process executed within an operating system are disclosed. Additionally, at least one thread is started within the operating system, the thread is associated with the process. Further, a plurality of streams within the thread are selected for execution on a multiple processor unit. Upon the occurrence of a context shifting event, one of the streams enters a kernel mode. If the first stream to enter kernel mode must block, then the execution of the other streams of the plurality of streams is also blocked.
    Type: Grant
    Filed: August 18, 2003
    Date of Patent: March 10, 2009
    Assignee: Cray Incorporated
    Inventors: Kitrick Sheets, Josh Williams, Jonathan Gettler, Steve Piatz, Andrew B. Hastings, Peter Hill, James G. Bravatto, James R. Kohn, Greg Titus
  • Publication number: 20050182838
    Abstract: A hosted service provider for the Internet is operated so as to provide dynamic management of hosted services across disparate customer accounts and/or geographically distinct sites.
    Type: Application
    Filed: November 8, 2004
    Publication date: August 18, 2005
    Inventors: Kitrick Sheets, Philip Smith, Stephen Engel, Yuefan Deng, Joseph Guistozzi, Alexander Korobka
  • Publication number: 20050044340
    Abstract: The present invention provides a method of initializing shared memory in a multinode system. The method includes building a local address space in each of a plurality of nodes and exporting the local address space from each of the plurality of nodes to a Remote Translation Table (RTT) in each of the plurality of nodes. The present invention further provides system including a plurality of nodes, each node having one or more processors and a memory controller operatively coupled to the one or more processors, wherein the memory controller includes a RTT for holding translation information for an entire virtual memory address space for the node, further wherein the RTT is initialized upon the start of a process by building a local address space in the node, and exporting the local address space from the node to a RTT in each of the plurality of other nodes.
    Type: Application
    Filed: August 18, 2003
    Publication date: February 24, 2005
    Inventors: Kitrick Sheets, Andrew Hastings
  • Publication number: 20050044339
    Abstract: Systems and methods include translating a virtual memory address into a physical memory address in a multi-node system that is initiated by providing the virtual memory address at a source node. A determination is made that a translation for the virtual memory address does not exist. A physical node to query is determined based on the virtual memory address. An emulated remote translation table (ERTT) segment is queried on the determined physical node to see if the ERTT segment may provide a translation. If the translation is received then the translation may be loaded into a TLB on the source node. Otherwise a memory reference error may be generated for the entity or application referencing the invalid virtual memory address.
    Type: Application
    Filed: August 18, 2003
    Publication date: February 24, 2005
    Inventor: Kitrick Sheets