Abstract: A media processing method for performing media processing by causing a processor to execute plural program modules, includes controlling input/output of media data, determining at least one call time, and calling a second program module in a second layer at each determined call time, by executing a first program module in a first layer, the first layer being higher than the second layer. The method further includes causing the processor to perform data conversion on the media data, by executing the second program module in the second layer, the data conversion being part of the media processing.

Abstract: A media processing method for performing media processing by causing a processor to execute plural program modules, includes controlling input/output of media data, determining at least one call time, and calling a second program module in a second layer at each determined call time, by executing a first program module in a first layer, the first layer being higher than the second layer. The method further includes causing the processor to perform data conversion on the media data, by executing the second program module in the second layer, the data conversion being part of the media processing.

Abstract: A media processing method for performing media processing by causing a processor to execute plural program modules, including: a first step of controlling input/output of media data, determining at least one call time, and calling a second program module in a second layer at each determined call time, by executing a first program module in a first layer, the first layer being higher than the second layer; a second step of calling at least one third program module in a third layer, the third layer being lower than the second layer, by executing the second program module in the second layer; and a third step of causing the processor to perform data conversion on the media data, the data conversion being an element of the media processing, by executing the third program module in the third layer.

Abstract: A resource allocation apparatus according to the present invention includes a system information acquisition unit configured to acquire program congestion pattern information indicating a group of programs executed concurrently on a system; and a resource allocation pattern determination unit configured to generate a plurality of resource allocation patterns for allocating the resource to a plurality of programs included in the group of programs indicated in the program congestion pattern information, and to calculate the total of amount of processing needed to execute the programs when the resource is allocated to the programs included in the group of programs by the generated resource allocation patterns, then to determine an optimal resource allocation pattern among the generated resource allocation patterns as a resource allocation pattern for the programs included in the group of programs based on the calculated total amount of processing.

Abstract: A software debugger tangibly embodied on a computer readable medium may display a microcomputer program being debugged so that a halt address at which the execution of the program is caused to halt can be distinguished from other addresses. When performing step-by-step execution of the program, a determination is made whether an instruction at the halt address is a predicate execution instruction or not. If the instruction is a predicate execution instruction, a condition flag value for the instruction is acquired. Based on the condition flag value, a determination is made whether the predicate execution instruction is to be executed or not. Then, the instruction at the halt address is displayed on a screen by changing a display method according to the result of the determination.

Abstract: This invention makes debugging more efficient when an object program is intended for processing a loop made up of n groups of iteration-forming instructions. Instructions in the secondary assembler program each has a combination of a line number “;lx” and an iteration identifier “;ix” attached thereto. The line number “;lx” specifies a source code from which the instruction is generated, and the iteration identifier “;ix” specifies an iteration to which the instruction belongs. When the user sets a breakpoint at an instruction, displayed in the windows are (a) a source code for generating the instruction at the breakpoint and (b) another source code for generating another instruction that belongs to a different group of iteration-forming instructions than the breakpoint instruction.

Abstract: A media processing method for performing media processing by causing a processor to execute plural program modules, including: a first step of controlling input/output of media data, determining at least one call time, and calling a second program module in a second layer at each determined call time, by executing a first program module in a first layer, the first layer being higher than the second layer; a second step of calling at least one third program module in a third layer, the third layer being lower than the second layer, by executing the second program module in the second layer; and a third step of causing the processor to perform data conversion on the media data, the data conversion being an element of the media processing, by executing the third program module in the third layer.

Abstract: According to the present invention, a compiler generates, as debugging information on variables appearing in a source program and the allocation of hardware resources, location information made up of elements showing, for each entry of a variable, an address range within which the variable is valid, a condition flag which is made true within the address range when the variable is valid, and a resource allocated to the variable. A debugging device analyzes the debugging information and stores it. When examining the value of a variable, an entry for the valid variable is determined from the address currently being executed and the value held in the condition flag register, and the resource allocated to that variable is obtained. In this way, the contents of the variable can be referenced correctly.

Abstract: This invention makes debugging more efficient when an object program is intended for processing a loop made up of n groups of iteration-forming instructions. Instructions in the secondary assembler program each has a combination of a line number “;lx” and an iteration identifier “;ix” attached thereto. The line number “;lx” specifies a source code from which the instruction is generated, and the iteration identifier “;ix” specifies an iteration to which the instruction belongs. When the user sets a breakpoint at an instruction, displayed in the windows are (a) a source code for generating the instruction at the breakpoint and (b) another source code for generating another instruction that belongs to a different group of iteration-forming instructions than the breakpoint instruction.

Abstract: In a software development support system for supporting the development of a program executable on a microcomputer having conditional instructions, it is an object of the invention to make provisions so that the executing process of the program's conditional logic structure implemented by a conditional instruction can be presented for viewing to the user in an easy-to-view form. To achieve this, a debugger is provided that has the functions of: when performing step-by-step execution of the program, determining whether an instruction at a halt address is a conditional instruction or not; if the instruction is a conditional instruction, then acquiring a condition flag value for the instruction; determining, based on the condition flag value, whether the conditional instruction is to be executed or not; and displaying the instruction at the halt address on a screen by changing display method according to the result of the determination.

Abstract: In an architecture having conditional instructions, when a block to be executed if a given condition is true and a block to be executed if the condition is false are structured through if-conversion optimization as a signal basic block in an assembler program by a compiler, in the prior art it has not been possible to establish a correct correspondence between variables and resources when the program is run on a debugging device, resulting in an inability to correctly respond to a user request to display the contents of a variable. According to the present invention, a compiler generates, as debugging information on variables appearing in a source program and the allocation of hardware resources, location information made up of elements showing, for each entry of a variable, an address range within which the variable is valid, a condition flag which is made true within the address range when the variable is valid, and a resource allocated to the variable.