Patents by Inventor Kiyohisa Fukaya

Kiyohisa Fukaya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of screening semiconductor device
    Patent number: 7106084
    Abstract: A method of screening a semiconductor device comprises the steps of successively forming a gate insulation film (102) and a conductive film (104) on a silicon wafer (100) to provide a structure (106) and bringing the first voltage application terminal (110) into contact with the back of the structure and the second voltage application terminal (112) having a potential different from that of the first voltage application terminal (110) into contact with the surface of the conductive film (104) to thereby apply a stress voltage to the structure (106).
    Type: Grant
    Filed: August 26, 2004
    Date of Patent: September 12, 2006
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Kiyohisa Fukaya
  • Semiconductor device and fabrication method of the same
    Patent number: 7045899
    Abstract: A semiconductor device includes semiconductor chips, a first conductive pattern, an external terminal and an encapsulating resin. Each of the semiconductor chips has a front side formed with integrated circuits and a back side. The semiconductor chips are stacked each other. The first conductive pattern electrically connects the integrated circuits. The external terminal is electrically connected to the first conductive pattern. The encapsulating resin encapsulates the semiconductor chips and the first conductive pattern.
    Type: Grant
    Filed: October 9, 2003
    Date of Patent: May 16, 2006
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Tae Yamane, Jyouji Katsuno, Kiyohisa Fukaya
  • Method of screening semiconductor device
    Publication number: 20050064611
    Abstract: A method of screening a semiconductor device comprises the steps of successively forming a gate insulation film (102) and a conductive film (104) on a silicon wafer (100) to provide a structure (106) and bringing the first voltage application terminal (110) into contact with the back of the structure and the second voltage application terminal (112) having a potential different from that of the first voltage application terminal (110) into contact with the surface of the conductive film (104) to thereby apply a stress voltage to the structure (106).
    Type: Application
    Filed: August 26, 2004
    Publication date: March 24, 2005
    Inventor: Kiyohisa Fukaya
  • Semiconductor device and fabrication method of the same
    Publication number: 20040070064
    Abstract: A semiconductor device includes semiconductor chips, a first conductive pattern, an external terminal and an encapsulating resin. Each of the semiconductor chips has a front side formed with integrated circuits and a back side. The semiconductor chips are stacked each other. The first conductive pattern electrically connects the integrated circuits. The external terminal is electrically connected to the first conductive pattern. The encapsulating resin encapsulates the semiconductor chips and the first conductive pattern.
    Type: Application
    Filed: October 9, 2003
    Publication date: April 15, 2004
    Inventors: Tae Yamane, Jyouji Katsuno, Kiyohisa Fukaya