Patents by Inventor KIYOHISA SAKAI

KIYOHISA SAKAI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11942495
    Abstract: A semiconductor device includes a semiconductor chip, a circuit board, a heat releasing plate, an adhesive member, and a conductive member. The circuit board transmits a signal of the semiconductor chip. The heat releasing plate has the semiconductor chip disposed thereon, and has an opening in a region on the outer side of a semiconductor chip placement region that is a region in which the semiconductor chip is disposed. The adhesive member is disposed in a region on the outer side of the opening on a different surface of the heat releasing plate from the surface on which the semiconductor chip is disposed, and bonds the circuit board and the heat releasing plate to each other. The conductive member connects the semiconductor chip and the circuit board to each other via the opening.
    Type: Grant
    Filed: June 21, 2019
    Date of Patent: March 26, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Daisuke Chino, Hiroyuki Shigeta, Shigekazu Ishii, Koyo Hosokawa, Hirohisa Yasukawa, Mitsuhito Kanatake, Kosuke Hareyama, Yutaka Ootaki, Kiyohisa Sakai, Atsushi Tsukada, Hirotaka Kobayashi, Ninao Sato, Yuki Yamane
  • Publication number: 20220302674
    Abstract: An object of the present technique is to easily downsize a semiconductor laser driving apparatus incorporating a laser driver. A semiconductor laser driving apparatus includes a substrate, a laser driver, a semiconductor laser, side walls, and a test pad. The substrate incorporates the laser driver. The semiconductor laser is mounted on one surface of the substrate of the semiconductor laser driving apparatus. Connection wiring electrically connects the laser driver and the semiconductor laser to each other with a wiring inductance of 0.5 nanohenries or less. The outer walls surround a predetermined mounting region that is included in the one surface of the substrate and where the semiconductor laser is mounted. The test pad is provided in a region that is included in the one surface of the substrate but does not correspond to the mounting region.
    Type: Application
    Filed: August 12, 2020
    Publication date: September 22, 2022
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Kiyohisa SAKAI, Hirohisa YASUKAWA
  • Publication number: 20220294179
    Abstract: An object of the present technique is to improve safety in a semiconductor laser driving apparatus that diffuses laser light by a diffusion plate. A substrate incorporates a laser driver, and a semiconductor laser is mounted on one surface of the substrate. Connection wiring electrically connects the laser driver and the semiconductor laser to each other with a wiring inductance of 0.5 nanohenries or less. A diffusion plate diffuses laser light irradiated by the semiconductor laser. A transparent conductive film is formed on a predetermined surface of the diffusion plate. In addition, the laser driver drives the semiconductor laser to irradiate the laser light on the basis of an electric characteristic value of the conductive film.
    Type: Application
    Filed: July 20, 2020
    Publication date: September 15, 2022
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Kiyohisa SAKAI, Hirohisa YASUKAWA, Nobuaki KAJI
  • Publication number: 20220293545
    Abstract: A light emitting device includes a first substrate, a light source on a first surface of the first substrate and that emits light toward an object, and a driver disposed in the first substrate and that drives the light source. The driver overlaps the light source in a plan view. The light emitting device includes at least one first via disposed in the first substrate and overlapping the driver in the plan view, and a first conductor on a second surface of the first substrate opposite the first surface and overlapping the light source, the driver, and the at least one first via in the plan view. The first conductor is connected to the at least one first via.
    Type: Application
    Filed: July 1, 2020
    Publication date: September 15, 2022
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Kiyohisa SAKAI, Hirohisa YASUKAWA, Masayuki NAGAO
  • Publication number: 20220157865
    Abstract: To reduce the height of a semiconductor apparatus formed by stacking semiconductor chips. The semiconductor apparatus includes: a first package; a second package; and a connection part. The first package includes a substrate on which a first semiconductor chip and a first wiring connected to the first semiconductor chip are disposed. The second package includes a second semiconductor chip that exchanges a signal with the first semiconductor chip and has a surface on which a pad for transmitting the signal is formed, a sealing part that covers the second semiconductor chip while exposing at least a part of the surface of the second semiconductor chip, an insulation layer that is formed on the surface of the second semiconductor chip and a surface of the sealing part adjacent to the surface of the second semiconductor chip, and a second wiring that is connected to the pad via an opening disposed in the insulation layer and formed adjacent to the insulation layer, and transmits the signal.
    Type: Application
    Filed: February 10, 2020
    Publication date: May 19, 2022
    Inventors: YUJI NISHIDA, KIYOHISA SAKAI
  • Publication number: 20210233949
    Abstract: Deformation of a semiconductor chip is to be prevented in a semiconductor device in which a heat releasing plate and a circuit board are disposed. The semiconductor device includes the semiconductor chip, the circuit board, the heat releasing plate, an adhesive member, and a conductive member. The circuit board transmits a signal of the semiconductor chip. The heat releasing plate has the semiconductor chip disposed thereon, and has an opening in a region on the outer side of a semiconductor chip placement region that is a region in which the semiconductor chip is disposed. The adhesive member is disposed in a region on the outer side of the opening on a different surface of the heat releasing plate from the surface on which the semiconductor chip is disposed, and bonds the circuit board and the heat releasing plate to each other. The conductive member connects the semiconductor chip and the circuit board to each other via the opening.
    Type: Application
    Filed: June 21, 2019
    Publication date: July 29, 2021
    Inventors: DAISUKE CHINO, HIROYUKI SHIGETA, SHIGEKAZU ISHII, KOYO HOSOKAWA, HIROHISA YASUKAWA, MITSUHITO KANATAKE, KOSUKE HAREYAMA, YUTAKA OOTAKI, KIYOHISA SAKAI, ATSUSHI TSUKADA, HIROTAKA KOBAYASHI, NINAO SATO, YUKI YAMANE
  • Patent number: 10692823
    Abstract: There is provided a semiconductor device that enables a semiconductor module that connects a wiring substrate and a semiconductor chip mounted on the wiring substrate via a circuit element and that has reduced a wiring length to improve transmission quality of signals or the like so as to achieve miniaturization of the semiconductor module. The semiconductor device includes a wiring substrate, a semiconductor chip disposed on an upper surface of the wiring substrate, a resin portion formed between the wiring substrate and the semiconductor chip, and a circuit element embedded in the resin portion. The circuit element includes a first terminal connected to wiring formed on the upper surface of the wiring substrate, and a second terminal connected to a bump provided on a lower surface of the semiconductor chip.
    Type: Grant
    Filed: March 27, 2017
    Date of Patent: June 23, 2020
    Assignee: SONY CORPORATION
    Inventor: Kiyohisa Sakai
  • Publication number: 20190131258
    Abstract: To enable a semiconductor module that connects a wiring substrate and a semiconductor chip mounted on the wiring substrate via a circuit element and that has reduced a wiring length to improve transmission quality of signals or the like so as to achieve miniaturization of the semiconductor module.
    Type: Application
    Filed: March 27, 2017
    Publication date: May 2, 2019
    Inventor: KIYOHISA SAKAI