Abstract: A dual apparatus having a first unit and a second unit of a same configuration, one being operated in an active state while the other in a standby state. Each of these first and second units comprises a first selector for setting a current unit to the active state if a predetermined fault occurs in the other unit; a second selector for sending information indicative of the setting of the current unit to the active state, if a predetermined fault occurs in the other unit and the first selector selects a first act state, to the other unit and, setting the current unit to the standby state, if the predetermined fault does not take place in the other unit and the first selector selects the active state and a state indicated by information supplied from the other unit is the active state; and a register for holding one of the active and standby states selected by the second selector.

Abstract: An ATM switch system performs a DMA (direct memory access) transfer of a command and status data between a call processor and a processor of a communications control device via a peripheral interface. An inter-processor DMA transfer controller of the communications control device controls a DMA transfer between its memory and the main memory of a call processor for expediting communications between the two processors.

Abstract: A packet data switching system having packet switching equipment and a plurality of transfer control units cooperating with the packet switching equipment exchanging packet data to be transferred through the transfer control units. In the system each packet data is divided into packet frames each having the same frame length and all the packet frames are processed synchronously in each of the transfer control units. Each of the packet frames is composed of a header area and data area. The header area is used for indicating transfer control information, such as an address of a destination transfer control unit and a continuous transmission flag which denotes that the related packet frame should be exchanged to the same destination as that of the preceding packet frame.

Abstract: A packet data and a header added to a head of the packet data for specifying a transfer condition of the packet data are divided together to data blocks (DBs) each having a designated data length, consisting of an initial DB including the header and an initial part of the packet data, intermediate DBs each including an intermediate part of the packet data and a last DB including a last part of the packet data, so as to be transferred to a data transfer destination in a data processor of a switching system in accordance with write commands for the initial, intermediate and last DBs respectively, and a read command for asking whether the DBs are correctly transferred is sent to the data transfer destination once, after the DBs are transferred. When the DBs are transferred, the packet data is restored at the data transfer destination only by synthesizing the transferred DBs and removing the header.

Abstract: In the transmission data test mode of the integrated circuit, the user sets test transmission data as transmission data and supplies a transmission data test command to a returning unit, whereby the test transmission data output from the transmission unit is returned by the returning unit and received by the reception unit. In that case, a format converting unit receives the test transmission data in the data format of the transmission data. Then, by comparing the test transmission data and data received by the reception unit, the user can carry out a transmission data test. In the reception data test mode of the integrated circuit, the user sets test reception data, designates a reception timing and supplies a reception data test command to a test reception data input unit, whereby the test reception data is received by the reception unit via the test reception data input unit.

Abstract: A boot program which can independently set the signaling links with the exchange is stored in the memory of a line concentration group. Under this boot program, a signaling controller (SGC) is used to set up a signaling link from the line concentrator to the exchange. Through the signaling link, a call processing program is transferred from the exchange side to the line concentrator side, and the transferred call processing program is used to start up the line processor in the line concentration group.