Patents by Inventor Kiyokawa Toshiyuki
Kiyokawa Toshiyuki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240003967Abstract: A stand-alone active thermal interposer device for use in testing an unpackaged integrated circuit device under test (DUT), the active thermal interposer device includes a body layer having a first surface and a second surface, wherein the first surface is operable to be disposed adjacent to a cold plate, and a plurality of heating zones defined across a second surface of the body layer, the plurality of heating zones operable to be controlled by a thermal controller to selectively heat and maintain respective temperatures thereof, the plurality of heating zones operable to heat a plurality of areas of the DUT when the second surface of the body layer is disposed adjacent to an interface surface of the DUT during testing of the DUT.Type: ApplicationFiled: May 31, 2023Publication date: January 4, 2024Inventors: Samer Kabbani, Paul Ferrari, Ikeda Hiroki, Kiyokawa Toshiyuki, Gregory Cruzan, Karthik Ranganathan, Todd Berk, Ian Williams, Mohammad Ghazvini, Thomas Jones
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Patent number: 11846669Abstract: A stand-alone active thermal interposer device for use in testing a system-in-package device under test (DUT), the active thermal interposer device includes a body layer having a first surface and a second surface, wherein the first surface is operable to be disposed adjacent to a cold plate, and a plurality of heating zones defined across a second surface of the body layer, the plurality of heating zones operable to be controlled by a thermal controller to selectively heat and maintain respective temperatures thereof, the plurality of heating zones operable to heat a plurality of areas of the DUT when the second surface of the body layer is disposed adjacent to an interface surface of the DUT during testing of the DUT.Type: GrantFiled: June 15, 2022Date of Patent: December 19, 2023Assignee: Advantest Test Solutions, Inc.Inventors: Samer Kabbani, Paul Ferrari, Ikeda Hiroki, Kiyokawa Toshiyuki, Gregory Cruzan, Karthik Ranganathan, Todd Berk, Ian Williams, Mohammad Ghazvini, Thomas Jones
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ERGONOMIC LOADING FOR A TEST INTERFACE BOARD (TIB) / BURN-IN-BOARD (BIB) IN A SLOT-BASED TEST SYSTEM
Publication number: 20230393190Abstract: A testing apparatus includes a tester rack with a plurality of slots where at least one slot in the tester rack is a dedicated slot operable to receive a test interface board (TIB) from a back of the tester rack, where the back of the tester rack is opposite a front of a tester rack, and where the front of the tester rack faces a handler and a front-facing elevator. The apparatus also includes a handler operable to load devices under test (DUTs) onto the TIB and a front-facing elevator move the TIB from the dedicated slot to an available slot in the tester rack, wherein the available slot includes power electronics operable to connect to the TIB to test devices under test (DUT) disposed on the TIB.Type: ApplicationFiled: June 2, 2022Publication date: December 7, 2023Inventors: Karthik Ranganathan, Gregory Cruzan, Gilberto Oseguera, Kiyokawa Toshiyuki, Shigihara Takayuki -
Patent number: 11774492Abstract: A stand-alone active thermal interposer device for use in testing a system-in-package device under test (DUT), the active thermal interposer device includes a body layer having a first surface and a second surface, wherein the first surface is operable to be disposed adjacent to a cold plate, and a plurality of heating zones defined across a second surface of the body layer, the plurality of heating zones operable to be controlled by a thermal controller to selectively heat and maintain respective temperatures thereof, the plurality of heating zones operable to heat a plurality of areas of the DUT when the second surface of the body layer is disposed adjacent to an interface surface of the DUT during testing of the DUT.Type: GrantFiled: June 15, 2022Date of Patent: October 3, 2023Assignee: Advantest Test Solutions, Inc.Inventors: Samer Kabbani, Paul Ferrari, Ikeda Hiroki, Kiyokawa Toshiyuki, Gregory Cruzan, Karthik Ranganathan, Todd Berk, Ian Williams, Mohammad Ghazvini, Tom Jones
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Patent number: 11754620Abstract: A stand-alone active thermal interposer device for use in testing a system-in-package device under test (DUT), the active thermal interposer device includes a body layer having a first surface and a second surface, wherein the first surface is operable to be disposed adjacent to a cold plate, and a plurality of heating zones defined across a second surface of the body layer, the plurality of heating zones operable to be controlled by a thermal controller to selectively heat and maintain respective temperatures thereof, the plurality of heating zones operable to heat a plurality of areas of the DUT when the second surface of the body layer is disposed adjacent to an interface surface of the DUT during testing of the DUT.Type: GrantFiled: May 13, 2022Date of Patent: September 12, 2023Assignee: Advantest Test Solutions, Inc.Inventors: Samer Kabbani, Paul Ferrari, Ikeda Hiroki, Kiyokawa Toshiyuki, Gregory Cruzan, Karthik Ranganathan, Todd Berk, Ian Williams, Mohammad Ghazvini, Tom Jones
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Patent number: 11674999Abstract: A system for testing circuits of an integrated circuit semiconductor wafer includes a tester system for generating signals for input to the circuits and for processing output signals from the circuits for testing the wafer and a test stack coupled to the tester system. The test stack includes a wafer probe for contacting a first surface of the wafer and for probing individual circuits of the circuits of the wafer, a wafer thermal interposer (TI) layer operable to contact a second surface of the wafer and operable to selectively heat areas of the wafer, and a cold plate disposed under the wafer TI layer and operable to cool the wafer. The system further includes a thermal controller for selectively heating and maintaining temperatures of the areas of the wafer by controlling cooling of the cold plate and by controlling selective heating of the wafer TI layer.Type: GrantFiled: April 20, 2022Date of Patent: June 13, 2023Assignee: Advantest Test Solutions, Inc.Inventors: Samer Kabbani, Paul Ferrari, Ikeda Hiroki, Kiyokawa Toshiyuki, Gregory Cruzan, Karthik Ranganathan
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Publication number: 20230129112Abstract: A stand-alone active thermal interposer device for use in testing a system-in-package device under test (DUT), the active thermal interposer device includes a body layer having a first surface and a second surface, wherein the first surface is operable to be disposed adjacent to a cold plate, and a plurality of heating zones defined across a second surface of the body layer, the plurality of heating zones operable to be controlled by a thermal controller to selectively heat and maintain respective temperatures thereof, the plurality of heating zones operable to heat a plurality of areas of the DUT when the second surface of the body layer is disposed adjacent to an interface surface of the DUT during testing of the DUT.Type: ApplicationFiled: June 15, 2022Publication date: April 27, 2023Inventors: Samer Kabbani, Paul Ferrari, Ikeda Hiroki, Kiyokawa Toshiyuki, Gregory Cruzan, Karthik Ranganathan, Todd Berk, Ian Williams, Mohammad Ghazvini, Tom Jones
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Patent number: 11609266Abstract: A stand-alone active thermal interposer device for use in testing a system-in-package device under test (DUT), the active thermal interposer device includes a body layer having a first surface and a second surface, wherein the first surface is operable to be disposed adjacent to a cold plate, and a plurality of heating zones defined across a second surface of the body layer, the plurality of heating zones operable to be controlled by a thermal controller to selectively heat and maintain respective temperatures thereof, the plurality of heating zones operable to heat a plurality of areas of the DUT when the second surface of the body layer is disposed adjacent to an interface surface of the DUT during testing of the DUT.Type: GrantFiled: November 19, 2021Date of Patent: March 21, 2023Assignee: Advantest Test Solutions, Inc.Inventors: Samer Kabbani, Paul Ferrari, Ikeda Hiroki, Kiyokawa Toshiyuki, Gregory Cruzan, Karthik Ranganathan, Todd Berk, Ian Williams, Mohammad Ghazvini, Thomas Jones
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Publication number: 20230083634Abstract: An automated test equipment (ATE) includes a test interface board assembly. The test interface board includes a socket configured to provide electrical couplings from the test interface board to a device under test (DUT). The socket is further configured to accept an active thermal interposer (ATI) device while the DUT is disposed in the socket. The socket includes a plurality of spring-loaded roller retention devices configured to retain one or more devices in the socket. The ATE further includes a Z-axis interface plate configured to open the plurality of spring-loaded roller retention devices to enable insertion of the DUT into the socket and an ATI placement plate configured to open the plurality of spring-loaded roller retention devices to enable insertion of the ATI device into the socket.Type: ApplicationFiled: July 29, 2022Publication date: March 16, 2023Inventors: KARTHIK RANGANATHAN, GILBERTO OSEGUERA, GREGORY CRUZAN, JOE KOETH, IKEDA HIROKI, KIYOKAWA TOSHIYUKI
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Patent number: 11567119Abstract: A stand-alone active thermal interposer device for use in testing a system-in-package device under test (DUT), the active thermal interposer device includes a body layer having a first surface and a second surface, wherein the first surface is operable to be disposed adjacent to a cold plate, and a plurality of heating zones defined across a second surface of the body layer, the plurality of heating zones operable to be controlled by a thermal controller to selectively heat and maintain respective temperatures thereof, the plurality of heating zones operable to heat a plurality of areas of the DUT when the second surface of the body layer is disposed adjacent to an interface surface of the DUT during testing of the DUT.Type: GrantFiled: November 19, 2021Date of Patent: January 31, 2023Assignee: Advantest Test Solutions, Inc.Inventors: Samer Kabbani, Paul Ferrari, Ikeda Hiroki, Kiyokawa Toshiyuki, Gregory Cruzan, Karthik Ranganathan, Todd Berk, Ian Williams, Mohammad Ghazvini, Thomas Jones
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Publication number: 20220326299Abstract: A stand-alone active thermal interposer device for use in testing a system-in-package device under test (DUT), the active thermal interposer device includes a body layer having a first surface and a second surface, wherein the first surface is operable to be disposed adjacent to a cold plate, and a plurality of heating zones defined across a second surface of the body layer, the plurality of heating zones operable to be controlled by a thermal controller to selectively heat and maintain respective temperatures thereof, the plurality of heating zones operable to heat a plurality of areas of the DUT when the second surface of the body layer is disposed adjacent to an interface surface of the DUT during testing of the DUT.Type: ApplicationFiled: June 15, 2022Publication date: October 13, 2022Inventors: Samer Kabbani, Paul Ferrari, Ikeda Hiroki, Kiyokawa Toshiyuki, Gregory Cruzan, Karthik Ranganathan, Todd Berk, Ian Williams, Mohammad Ghazvini, Tom Jones
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Publication number: 20220276301Abstract: A system for testing circuits of an integrated circuit semiconductor wafer includes a tester system for generating signals for input to the circuits and for processing output signals from the circuits for testing the wafer and a test stack coupled to the tester system. The test stack includes a wafer probe for contacting a first surface of the wafer and for probing individual circuits of the circuits of the wafer, a wafer thermal interposer (TI) layer operable to contact a second surface of the wafer and operable to selectively heat areas of the wafer, and a cold plate disposed under the wafer TI layer and operable to cool the wafer. The system further includes a thermal controller for selectively heating and maintaining temperatures of the areas of the wafer by controlling cooling of the cold plate and by controlling selective heating of the wafer TI layer.Type: ApplicationFiled: April 20, 2022Publication date: September 1, 2022Inventors: Samer Kabbani, Paul Ferrari, Ikeda Hiroki, Kiyokawa Toshiyuki, Gregory Cruzan, Karthik Ranganathan
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Publication number: 20220268831Abstract: A stand-alone active thermal interposer device for use in testing a system-in-package device under test (DUT), the active thermal interposer device includes a body layer having a first surface and a second surface, wherein the first surface is operable to be disposed adjacent to a cold plate, and a plurality of heating zones defined across a second surface of the body layer, the plurality of heating zones operable to be controlled by a thermal controller to selectively heat and maintain respective temperatures thereof, the plurality of heating zones operable to heat a plurality of areas of the DUT when the second surface of the body layer is disposed adjacent to an interface surface of the DUT during testing of the DUT.Type: ApplicationFiled: May 13, 2022Publication date: August 25, 2022Inventors: Samer Kabbani, Paul Ferrari, Ikeda Hiroki, Kiyokawa Toshiyuki, Gregory Cruzan, Karthik Ranganathan, Todd Berk, Ian Williams, Mohammad Ghazvini, Tom Jones
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Publication number: 20220187361Abstract: A stand-alone active thermal interposer device for use in testing a system-in-package device under test (DUT), the active thermal interposer device includes a body layer having a first surface and a second surface, wherein the first surface is operable to be disposed adjacent to a cold plate, and a plurality of heating zones defined across a second surface of the body layer, the plurality of heating zones operable to be controlled by a thermal controller to selectively heat and maintain respective temperatures thereof, the plurality of heating zones operable to heat a plurality of areas of the DUT when the second surface of the body layer is disposed adjacent to an interface surface of the DUT during testing of the DUT.Type: ApplicationFiled: November 19, 2021Publication date: June 16, 2022Inventors: Samer Kabbani, Paul Ferrari, Ikeda Hiroki, Kiyokawa Toshiyuki, Gregory Cruzan, Karthik Ranganathan, Todd Berk, Ian Williams, Mohammad Ghazvini, Tom Jones
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Publication number: 20220178991Abstract: A stand-alone active thermal interposer device for use in testing a system-in-package device under test (DUT), the active thermal interposer device includes a body layer having a first surface and a second surface, wherein the first surface is operable to be disposed adjacent to a cold plate, and a plurality of heating zones defined across a second surface of the body layer, the plurality of heating zones operable to be controlled by a thermal controller to selectively heat and maintain respective temperatures thereof, the plurality of heating zones operable to heat a plurality of areas of the DUT when the second surface of the body layer is disposed adjacent to an interface surface of the DUT during testing of the DUT.Type: ApplicationFiled: November 19, 2021Publication date: June 9, 2022Inventors: Samer Kabbani, Paul Ferrari, Ikeda Hiroki, Kiyokawa Toshiyuki, Gregory Cruzan, Karthik Ranganathan, Todd Berk, Ian Williams, Mohammad Ghazvini, Tom Jones
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Publication number: 20220155364Abstract: A system for testing circuits of an integrated circuit semiconductor wafer includes a tester system for generating signals for input to the circuits and for processing output signals from the circuits for testing the wafer and a test stack coupled to the tester system. The test stack includes a wafer probe for contacting a first surface of the wafer and for probing individual circuits of the circuits of the wafer, a wafer thermal interposer (TI) layer operable to contact a second surface of the wafer and operable to selectively heat areas of the wafer, and a cold plate disposed under the wafer TI layer and operable to cool the wafer. The system further includes a thermal controller for selectively heating and maintaining temperatures of the areas of the wafer by controlling cooling of the cold plate and by controlling selective heating of the wafer TI layer.Type: ApplicationFiled: November 16, 2021Publication date: May 19, 2022Inventors: Samer Kabbani, Paul Ferrari, Ikeda Hiroki, Kiyokawa Toshiyuki, Greg Cruzan, Karthik Ranganathan