Patents by Inventor Kiyomichi Araki

Kiyomichi Araki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8766834
    Abstract: The discrete time analog circuit (100) is provided with: a rotate capacitor circuit (150); an amplifier (141) that is connected to the input line or the output line of the rotate capacitor (150), and amplifies the input potential or input charge; a coefficient circuit (140) that is positioned in series with the amplifier (141), and has two history capacitors (143-1, 143-2) positioned parallel to each other; a first active capacitor among the two history capacitors (143-1, 143-2) that is connected to and charges the amplifier (141); and a clock generation circuit (110) that is connected to the input line or the output line without the involvement of the amplifier (141), and that sequentially changes the pairing of the rotate capacitor circuit (150) a second active capacitor, which shares a charge with the rotate capacitor circuit (150).
    Type: Grant
    Filed: July 27, 2011
    Date of Patent: July 1, 2014
    Assignee: Panasonic Corporation
    Inventors: Hiroka Shiozaki, Kiyomichi Araki, Yohei Morishita, Masaki Kanemaru
  • Patent number: 8693599
    Abstract: Disclosed is a wireless receiving apparatus, whereby inter-antenna interference can be reduced without inducing an increase of a mounting area due to an increase of the number of antennas, and the number of RFIC input terminals, circuit scale and power consumption can be reduced. In the wireless receiving apparatus (100), when a receiving antenna (110-1) and a down-converter (130) are connected with a multiplexer (120) therebetween, a capacity control unit (190-2) controls the capacity value of the capacity-variable parasitic element (180-2) connected to the receiving antenna (110-2) such that the communication capacity of the receiving antenna (110-1) is maximum.
    Type: Grant
    Filed: September 6, 2010
    Date of Patent: April 8, 2014
    Assignee: Panasonic Corporation
    Inventors: Kiyomichi Araki, Noriaki Saito, Tadashi Morita
  • Publication number: 20130222164
    Abstract: The discrete time analog circuit (100) is provided with: a rotate capacitor circuit (150); an amplifier (141) that is connected to the input line or the output line of the rotate capacitor (150), and amplifies the input potential or input charge; a coefficient circuit (140) that is positioned in series with the amplifier (141), and has two history capacitors (143-1, 143-2) positioned parallel to each other; a first active capacitor among the two history capacitors (143-1, 143-2) that is connected to and charges the amplifier (141); and a clock generation circuit (110) that is connected to the input line or the output line without the involvement of the amplifier (141), and that sequentially changes the pairing of the rotate capacitor circuit (150) a second active capacitor, which shares a charge with the rotate capacitor circuit (150).
    Type: Application
    Filed: July 27, 2011
    Publication date: August 29, 2013
    Applicant: PANASONIC CORPORATION
    Inventors: Hiroka Shiozaki, Kiyomichi Araki, Yohei Morishita, Masaki Kanemaru
  • Patent number: 8483643
    Abstract: Disclosed is a harmonic rejection mixer that makes it possible to suppress high-frequency response, while keeping the number of gm elements from increasing. In a harmonic rejection mixer that regulates the waveform of an output signal by mixing outputs of multiple mixers that are connected in parallel with the latter stage of multiple gm elements, some of the gm elements are shared by I phase and Q phase by using a control signal with a duty ratio of less than 50% to drive at least some of the mixers, and then using the period in which the I-phase mixers are inactive to activate the Q-phase mixers.
    Type: Grant
    Filed: January 29, 2010
    Date of Patent: July 9, 2013
    Assignee: Panasonic Corporation
    Inventors: Yoshito Shimizu, Noriaki Saito, Kiyomichi Araki, Takafumi Nasu
  • Publication number: 20120230452
    Abstract: Disclosed is a wireless receiving apparatus, whereby inter-antenna interference can be reduced without inducing an increase of a mounting area due to an increase of the number of antennas, and the number of RFIC input terminals, circuit scale and power consumption can be reduced. In the wireless receiving apparatus (100), when a receiving antenna (110-1) and a down-converter (130) are connected with a multiplexer (120) therebetween, a capacity control unit (190-2) controls the capacity value of the capacity-variable parasitic element (180-2) connected to the receiving antenna (110-2) such that the communication capacity of the receiving antenna (110-1) is maximum.
    Type: Application
    Filed: September 6, 2010
    Publication date: September 13, 2012
    Applicant: PANASONIC CORPORATION
    Inventors: Kiyomichi Araki, Noriaki Saito, Tadashi Morita
  • Patent number: 8229987
    Abstract: A direct sampling circuit and a receiver which carry out discrete time analog processing with a high degree of design freedom and are provided with a filter property which is achievable to comply with the receipt of a broad band signal. A plurality of discrete time analog processing circuits (101) are connected in parallel with each other, a gm value and a capacitance of a capacitor in each circuit system are set independently based on a prescribed condition, and an output signal obtained from each circuit system is synthesized by means of a buffer capacitor (102), so that an equivalently high-dimensional IIR filter can be put into practice.
    Type: Grant
    Filed: March 5, 2007
    Date of Patent: July 24, 2012
    Assignee: Panasonic Corporation
    Inventors: Yoshifumi Hosokawa, Katsuaki Abe, Noriaki Saito, Kiyomichi Araki, Yohei Morishita
  • Patent number: 8145175
    Abstract: The sampling filter apparatus 100 includes the first sampling switch 130, the second sampling switch 131, the first integrator 1500 for integrating the charge input from the first sampling switch, the second integrator 1501 for integrating the charge input from the second sampling switch, a plurality of integrators connected to both of the first integrator and the second integrator via a charging switch, respectively, the control section 140, a plurality of charging switches, and a plurality of discharge switches. A charge input from the sampling switch 130, a charge accumulated in the capacitor 1500 and a charge accumulated in a capacitor 1510 are shared by the capacitor 1500, the capacitor 1510 and the capacitor 1530, and the charge accumulated in the capacitor 1530 is output.
    Type: Grant
    Filed: September 25, 2008
    Date of Patent: March 27, 2012
    Assignee: Panasonic Corporation
    Inventors: Kentaro Miyano, Yoshifumi Hosokawa, Katsuaki Abe, Noriaki Saito, Kiyomichi Araki
  • Publication number: 20120049926
    Abstract: Disclosed is a harmonic rejection mixer that makes it possible to suppress high-frequency response, while keeping the number of gm elements from increasing. In a harmonic rejection mixer that regulates the waveform of an output signal by mixing outputs of multiple mixers that are connected in parallel with the latter stage of multiple gm elements, some of the gm elements are shared by I phase and Q phase by using a control signal with a duty ratio of less than 50% to drive at least some of the mixers, and then using the period in which the I-phase mixers are inactive to activate the Q-phase mixers.
    Type: Application
    Filed: January 29, 2010
    Publication date: March 1, 2012
    Applicant: PANASONIC CORPORATION
    Inventors: Yoshito Shimizu, Noriaki Saito, Kiyomichi Araki, Takafumi Nasu
  • Publication number: 20100308816
    Abstract: Provided is a highly sensitive sensor system that can improve the S/N ratio by use of an electronic circuit without complicating the sensor body or degrading temporal resolution. A broad spectrum sensor element outputs an electric signal corresponding to a detected physical quantity, the sensor driven by multiplying a carrier signal by m-sequence code. The spread spectrum signal, after phase adjustment, is used to demodulate the sensor output signal, which corresponds to the broad spread spectrum of the physical quantity. The electrical noise generated in the sensor is a broad spread spectrum and is suppressed by low-pass filtering so as to improve the S/N ratio.
    Type: Application
    Filed: October 29, 2008
    Publication date: December 9, 2010
    Applicant: Tokyo Institute of Technology
    Inventors: Tomoaki Ueda, Masanori Abe, Takashi Nakagawa, Masaru Tada, Tetsuya Mizumoto, Hiroshi Handa, Adarsh Sandhu, Kiyomichi Araki
  • Publication number: 20100201424
    Abstract: The sampling filter apparatus 100 includes the first sampling switch 130, the second sampling switch 131, the first integrator 1500 for integrating the charge input from the first sampling switch, the second integrator 1501 for integrating the charge input from the second sampling switch, a plurality of integrators connected to both of the first integrator and the second integrator via a charging switch, respectively, the control section 140, a plurality of charging switches, and a plurality of discharge switches. A charge input from the sampling switch 130, a charge accumulated in the capacitor 1500 and a charge accumulated in a capacitor 1510 are shared by the capacitor 1500, the capacitor 1510 and the capacitor 1530, and the charge accumulated in the capacitor 1530 is output.
    Type: Application
    Filed: September 25, 2008
    Publication date: August 12, 2010
    Applicant: PANASONIC CORPORATION
    Inventors: Kentaro Miyano, Yoshifumi Hosokawa, Katsuaki Abe, Noriaki Saito, Kiyomichi Araki
  • Patent number: 7528687
    Abstract: A filtering device is disclosed that can be made compact and has wide-band band-pass characteristics. The filtering device includes a first filtering unit that is composed of a distributed constant circuit and is capable of eliminating a first frequency component or a second frequency component wherein the second frequency being higher than the first frequency, and a second filtering unit that attenuates components of frequencies lower than the first frequency or components of frequencies higher than the second frequency.
    Type: Grant
    Filed: April 15, 2005
    Date of Patent: May 5, 2009
    Assignees: Fujitsu Component Limited, Tokyo Institute of Technology
    Inventors: Hiroto Inoue, Shigemi Kurashima, Takuya Uchiyama, Masahiro Yanagi, Takashi Arita, Kiyomichi Araki, Hitoshi Ishida
  • Publication number: 20090009155
    Abstract: A direct sampling circuit and a receiver which carry out discrete time analog processing with a high degree of design freedom and are provided with a filter property which is achievable to comply with the receipt of a broad band signal. A plurality of discrete time analog processing circuits (101) are connected in parallel with each other, a gm value and a capacitance of a capacitor in each circuit system are set independently based on a prescribed condition, and an output signal obtained from each circuit system is synthesized by means of a buffer capacitor (102), so that an equivalently high-dimensional IIR filter can be put into practice.
    Type: Application
    Filed: March 5, 2007
    Publication date: January 8, 2009
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Yoshifumi Hosokawa, Katsuaki Abe, Noriaki Saito, Kiyomichi Araki, Yohei Morishita
  • Patent number: 7443271
    Abstract: In order to provide a band pass filter for high wavelength which has a wideband, small insertion loss and flat passband and obtains steep attenuation, a plurality of ring filters, in which, an input terminal of a high-frequency signal is provided to an arbitrary point on a line in a microstripline ring resonator having the line with one wavelength at electrical length, an output terminal is provided to a point positioned at a half wavelength at electrical length from the input terminal, a open stub of ¼ wavelength at electrical length (or ½ wavelength short stub) is connected to a point positioned at ¼ wavelength at electrical length from the input terminal, are connected by cascade connection with attenuation pole frequencies being different.
    Type: Grant
    Filed: February 20, 2004
    Date of Patent: October 28, 2008
    Assignee: The Circle for the Promotion of Science and Engineering
    Inventors: Kiyomichi Araki, Hitoshi Ishida, Takao Nakagawa
  • Publication number: 20070063794
    Abstract: In order to provide a band pass filter for high wavelength which has a wideband, small insertion loss and flat passband and obtains steep attenuation, a plurality of ring filters, in which, an input terminal of a high-frequency signal is provided to an arbitrary point on a line in a microstripline ring resonator having the line with one wavelength at electrical length, an output terminal is provided to a point positioned at a half wavelength at electrical length from the input terminal, a open stub of ¼ wavelength at electrical length (or ½ wavelength short stub) is connected to a point positioned at ¼ wavelength at electrical length from the input terminal, are vertically connected with attenuation pole frequencies being different.
    Type: Application
    Filed: February 20, 2004
    Publication date: March 22, 2007
    Inventors: Kiyomichi Araki, Hitoshi Ishida, Takao Nakagawa
  • Publication number: 20050242905
    Abstract: A filtering device is disclosed that can be made compact and has wide-band band-pass characteristics. The filtering device includes a first filtering unit that is composed of a distributed constant circuit and is capable of eliminating a first frequency component or a second frequency component wherein the second frequency being higher than the first frequency, and a second filtering unit that attenuates components of frequencies lower than the first frequency or components of frequencies higher than the second frequency.
    Type: Application
    Filed: April 15, 2005
    Publication date: November 3, 2005
    Applicants: FUJITSU COMPONENT LIMITED, THE CIRCLE FOR THE PROMOTION OF SCIENCE AND ENGINEERING
    Inventors: Hiroto Inoue, Shigemi Kurashima, Takuya Uchiyama, Masahiro Yanagi, Takashi Arita, Kiyomichi Araki, Hitoshi Ishida
  • Patent number: 3978433
    Abstract: A magnetic transmission device using the edge-guided mode of propagation includes a magnetic dielectric slab having a conductor plate member mounted thereon adapted to be magnetized perpendicular to a ground plane on which the slab is placed. The conductor plate member is partially short-circuited to the ground plane.
    Type: Grant
    Filed: May 6, 1975
    Date of Patent: August 31, 1976
    Assignee: Yoshiyuki Naito
    Inventors: Yoshiyuki Naito, Kiyomichi Araki, Tetsu Koyama