Patents by Inventor Kiyonaga Fujii

Kiyonaga Fujii has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Agent for treating or preventing cancer, and combination of RF pathway inhibitor and MEK inhibitor for treating or preventing cancer
    Patent number: 11925646
    Abstract: The present invention provides a method for treatment or prevention of cancer through novel action mechanism, namely, through inhibition of a riboflavin pathway. The method for treatment or prevention of cancer comprises administering an RF pathway inhibitor to a subject in need thereof.
    Type: Grant
    Filed: February 25, 2022
    Date of Patent: March 12, 2024
    Assignees: NATIONAL UNIVERSITY CORP. HOKKAIDO UNIVERSITY, Tsuzuki Educational Institute
    Inventors: Takako Ooshio, Masahiro Sonoshita, Satoshi Ichikawa, Yusuke Satoh, Kiyonaga Fujii
  • AGENT FOR TREATING OR PREVENTING CANCER, AND COMBINATION OF RF PATHWAY INHIBITOR AND MEK INHIBITOR FOR TREATING OR PREVENTING CANCER
    Publication number: 20220280521
    Abstract: The present invention provides a method for treatment or prevention of cancer through novel action mechanism, namely, through inhibition of a riboflavin pathway. The method for treatment or prevention of cancer comprises administering an RF pathway inhibitor to a subject in need thereof.
    Type: Application
    Filed: February 25, 2022
    Publication date: September 8, 2022
    Inventors: Takako OOSHIO, Masahiro SONOSHITA, Satoshi ICHIKAWA, Yusuke SATOH, Kiyonaga FUJII
  • Leak current detection circuit, body bias control circuit, semiconductor device, and semiconductor device testing method
    Patent number: 8174282
    Abstract: A leak current detection circuit that improves the accuracy for detecting a leak current in a MOS transistor without enlarging the circuit scale. The leak current detection circuit includes at least one P-channel MOS transistor which is coupled to a high potential power supply and which is normally inactivated and generates a first leak current, at least one N-channel MOS transistor which is coupled between a low potential power and at least the one P-channel MOS transistor and which is normally inactivated and generates a second leak current, and a detector which detects a potential generated at a node between the at least one P-channel MOS transistor and the at least one N-channel MOS transistor in accordance with the first and second leak currents.
    Type: Grant
    Filed: October 9, 2009
    Date of Patent: May 8, 2012
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Kiyonaga Fujii, Yasushige Ogawa
  • LEAK CURRENT DETECTION CIRCUIT, BODY BIAS CONTROL CIRCUIT, SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE TESTING METHOD
    Publication number: 20100026335
    Abstract: A leak current detection circuit that improves the accuracy for detecting a leak current in a MOS transistor without enlarging the circuit scale. The leak current detection circuit includes at least one P-channel MOS transistor which is coupled to a high potential power supply and which is normally inactivated and generates a first leak current, at least one N-channel MOS transistor which is coupled between a low potential power and at least the one P-channel MOS transistor and which is normally inactivated and generates a second leak current, and a detector which detects a potential generated at a node between the at least one P-channel MOS transistor and the at least one N-channel MOS transistor in accordance with the first and second leak currents.
    Type: Application
    Filed: October 9, 2009
    Publication date: February 4, 2010
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventors: Kiyonaga Fujii, Yasushige Ogawa