Abstract: An A/D converter in the form of a complementary MOS integrated circuit and having a plurality of input channels. The input circuit includes a plurality of input protection circuits corresponding to the input channels. Each of the input protection circuits comprises an analog input terminal to be connected to receive an analog voltage signal, and a first semiconductor active element formed within a first conduction type island formed in the semiconductor substrate. The first semiconductor active element has one end connected to the input terminal and a second end connected to a first wiring conductor for a first voltage. The first semiconductor active element operates to discharge a first excessive voltage to the first wiring conductor when the first excessive voltage is applied to the input terminal. Each of the input protection circuits also comprises a second semiconductor active element formed within a second conduction type island formed in the semiconductor substrate, separately from the first island.

Abstract: A code setting circuit for outputting a plurality of bits of code setting signal to a code generation circuit, includes a plurality of unitary circuits each generating one bit of the code setting signal. Each of the unitary circuits includes a first P-channel transistor having a source connected at to a high voltage supply line and a gate connected to commonly receive a power-on signal, and an N-channel effect transistor having a drain connected to a drain of of the first P-channel transistor and a source to a fusing-off pulse application pad. A second P-channel transistor is connected in parallel to the P-channel effect transistor and a gate connected to an output of a first inverter having an input connected to the drain of the first P-channel transistor. A thin film resistor is connected between the fusing-off pulse application pad and a ground line.

Abstract: A trimming code setting circuit formed between a first and a second potential source includes a transistor, an inverter, a capacitor and a fusible resistor. The transistor has its source-drain passage connected between the first potential source and an output node. The inverter is connected between the output node and a gate of the transistor. The capacitor is connected between the first potential source and the output node. The resistor is connected between the output node and the second potential source. A steady-state current does not flow after the resistor is cut and this allows an increase in current capability of the circuit. There is no possibility for the trimming codes to change with lapse of time.

Abstract: A semiconductor integrated circuit has a trimming code setting circuit so configured that a desired trimming code is set dependently upon whether or not a thin film resistor is cut. The trimming code setting circuit comprises first and second ratio circuits each of which includes a P-channel transistor having a source connected to a high voltage line and a drain connected through a thin film resistor to a low voltage line. A gate of the P-channel transistor is biased to allow a predetermined current to flow through the thin film resistor and a source-drain of the transistor and the thin film resistor forms a voltage output node. The voltage output node of each of the first and second ratio circuits is connected to a comparator, which in turn outputs a logical signal determined on the basis of whether or not the voltage on the voltage output node of the first ratio circuit is higher than the voltage on the voltage output node of the second ration circuit.

Abstract: An improved semiconductor integrated circuit device wherein a wiring connected with a constant potential point is arranged at least at the upper part between two wirings which are proximately arranged in parallel.