Abstract: In some embodiments, a method of forming an opening in a material comprises forming RIM over target material. Radiation is impinged onto the RIM through a masking tool over a continuous area of the RIM under which a target-material opening will be formed. The masking tool during the impinging allows more radiation there-through onto a mid-portion of the continuous area of the RIM in a vertical cross-section than onto laterally-opposing portions of the continuous area of the RIM that are laterally-outward of the mid-portion of the RIM in the vertical cross-section. After the impinging, the RIM is developed to form a RIM opening that has at least one pair of laterally-opposing ledges laterally-outward of the mid-portion of the RIM in the vertical cross-section elevationally between a top and a bottom of the RIM opening.

Abstract: A substrate comprises a pair of immediately-adjacent integrated-circuit dies having scribe-line area there-between. At least one of the dies comprises insulting material above integrated circuitry. The insulating material has an opening therein that extends elevationally inward to an upper conductive node of integrated circuitry within the one die. The one die comprises a conductive line of an RDL above the insulating material. The RDL-conductive line extends elevationally inward into the opening and is directly electrically coupled to the upper conductive node. The insulating material has a minimum elevational thickness from an uppermost surface of the upper conductive node to an uppermost surface of the insulating material that is immediately-adjacent the insulating-material opening. Insulator material is above a conductive test pad in the scribe-line area. The insulator material has an opening therein that extends elevationally inward to an uppermost surface of the conductive test pad.

Abstract: In some embodiments, a method of forming an opening in a material comprises forming RIM over target material. Radiation is impinged onto the RIM through a masking tool over a continuous area of the RIM under which a target-material opening will be formed. The masking tool during the impinging allows more radiation there-through onto a mid-portion of the continuous area of the RIM in a vertical cross-section than onto laterally-opposing portions of the continuous area of the RIM that are laterally-outward of the mid-portion of the RIM in the vertical cross-section. After the impinging, the RIM is developed to form a RIM opening that has at least one pair of laterally-opposing ledges laterally-outward of the mid-portion of the RIM in the vertical cross-section elevationally between a top and a bottom of the RIM opening.

Abstract: In some embodiments, a method of forming an opening in a material comprises forming RIM over target material. Radiation is impinged onto the RIM through a masking tool over a continuous area of the RIM under which a target-material opening will be formed. The masking tool during the impinging allows more radiation there-through onto a mid-portion of the continuous area of the RIM in a vertical cross-section than onto laterally-opposing portions of the continuous area of the RIM that are laterally-outward of the mid-portion of the RIM in the vertical cross-section. After the impinging, the RIM is developed to form a RIM opening that has at least one pair of laterally-opposing ledges laterally-outward of the mid-portion of the RIM in the vertical cross-section elevationally between a top and a bottom of the RIM opening.

Abstract: A substrate comprises a pair of immediately-adjacent integrated-circuit dies having scribe-line area there-between. At least one of the dies comprises insulting material above integrated circuitry. The insulating material has an opening therein that extends elevationally inward to an upper conductive node of integrated circuitry within the one die. The one die comprises a conductive line of an RDL above the insulating material. The RDL-conductive line extends elevationally inward into the opening and is directly electrically coupled to the upper conductive node. The insulating material has a minimum elevational thickness from an uppermost surface of the upper conductive node to an uppermost surface of the insulating material that is immediately-adjacent the insulating-material opening. Insulator material is above a conductive test pad in the scribe-line area. The insulator material has an opening therein that extends elevationally inward to an uppermost surface of the conductive test pad.

Abstract: A substrate comprises a pair of immediately-adjacent integrated-circuit dies having scribe-line area there-between. At least one of the dies comprises insulting material above integrated circuitry. The insulating material has an opening therein that extends elevationally inward to an upper conductive node of integrated circuitry within the one die. The one die comprises a conductive line of an RDL above the insulating material. The RDL-conductive line extends elevationally inward into the opening and is directly electrically coupled to the upper conductive node. The insulating material has a minimum elevational thickness from an uppermost surface of the upper conductive node to an uppermost surface of the insulating material that is immediately-adjacent the insulating-material opening. Insulator material is above a conductive test pad in the scribe-line area. The insulator material has an opening therein that extends elevationally inward to an uppermost surface of the conductive test pad.

Abstract: In some embodiments, a method of forming an opening in a material comprises forming RIM over target material. Radiation is impinged onto the RIM through a masking tool over a continuous area of the RIM under which a target-material opening will be formed. The masking tool during the impinging allows more radiation there-through onto a mid-portion of the continuous area of the RIM in a vertical cross-section than onto laterally-opposing portions of the continuous area of the RIM that are laterally-outward of the mid-portion of the RIM in the vertical cross-section. After the impinging, the RIM is developed to form a RIM opening that has at least one pair of laterally-opposing ledges laterally-outward of the mid-portion of the RIM in the vertical cross-section elevationally between a top and a bottom of the RIM opening.

Abstract: A substrate comprises a pair of immediately-adjacent integrated-circuit dies having scribe-line area there-between. At least one of the dies comprises insulting material above integrated circuitry. The insulating material has an opening therein that extends elevationally inward to an upper conductive node of integrated circuitry within the one die. The one die comprises a conductive line of an RDL above the insulating material. The RDL-conductive line extends elevationally inward into the opening and is directly electrically coupled to the upper conductive node. The insulating material has a minimum elevational thickness from an uppermost surface of the upper conductive node to an uppermost surface of the insulating material that is immediately-adjacent the insulating-material opening. Insulator material is above a conductive test pad in the scribe-line area. The insulator material has an opening therein that extends elevationally inward to an uppermost surface of the conductive test pad.

Abstract: A semiconductor device may include, but is not limited to, a semiconductor substrate having a first gate groove; a first fin structure underneath the first gate groove; a first diffusion region in the semiconductor substrate, the first diffusion region covering an upper portion of a first side of the first gate groove; and a second diffusion region in the semiconductor substrate. The second diffusion region covers a second side of the first gate groove. The second diffusion region has a bottom which is deeper than a top of the first fin structure.

Abstract: A semiconductor device includes a first capacitive insulating film, a semiconductor region, a gate insulating film, and a gate electrode. The semiconductor region has a groove. The gate insulating film covers a surface of the groove. The gate electrode is in the groove. The gate electrode includes first and second conductive films. The first conductive film is in contact with the gate insulating film. The first conductive film has an upper surface which is higher than a close portion of the second conductive film. The close portion is closer to the upper surface of the first conductive film.

Abstract: A semiconductor device comprises a semiconductor substrate; an element-forming region that includes semiconductor elements formed on the semiconductor substrate; a buried electrode plug formed so as to penetrate through the semiconductor substrate; and a trench-type electrode that is buried in a trench within the semiconductor substrate positioned between the element-forming region and the buried electrode plug.

Abstract: A semiconductor device capable of increasing ON current while reducing channel resistance and allowing transistors to operate independently and stably, having a fin formed to protrude from the bottom of a gate electrode trench, a gate insulating film covering the surfaces of the gate electrode trench and the fin, a gate electrode embedded in a lower part of the gate electrode trench and formed to stride over the fin via the gate insulating film, a first impurity diffusion region arranged on a first side face, and a second impurity diffusion region arranged on a second side face.

Abstract: Disclosed herein is a semiconductor device that includes: a semiconductor substrate; a well of a first conductive type that is formed in the semiconductor substrate; an element isolation region embedded in the semiconductor substrate so as to define an active region of the well; first and second gate electrodes each including a side surface and a bottom surface that are covered with the well such that the first and second gate electrodes are formed to traverse the active region, and a peak depth of the well corresponding to the active region is equal to or shallower than a peak depth of the well corresponding to the element isolation region.

Abstract: [Problem] To suppress damage to a semiconductor beam or a semiconductor substrate resulting from dry etching of gate electrode material during manufacture.

Abstract: A semiconductor device may include, but is not limited to, a semiconductor substrate having a first gate groove; a first fin structure underneath the first gate groove; a first diffusion region in the semiconductor substrate, the first diffusion region covering an upper portion of a first side of the first gate groove; and a second diffusion region in the semiconductor substrate. The second diffusion region covers a second side of the first gate groove. The second diffusion region has a bottom which is deeper than a top of the first fin structure.

Abstract: A semiconductor device may include, but is not limited to, a semiconductor substrate having a first gate groove; a first fin structure underneath the first gate groove; a first diffusion region in the semiconductor substrate, the first diffusion region covering an upper portion of a first side of the first gate groove; and a second diffusion region in the semiconductor substrate. The second diffusion region covers a second side of the first gate groove. The second diffusion region has a bottom which is deeper than a top of the first fin structure.

Abstract: A semiconductor device comprises a trench isolation. The trench isolation is formed in a surface of a semiconductor substrate to define an active region a well region, and a bottom of the trench isolation is positioned within the well region. The trench isolation includes a conductive wiring electrically connected to the well region and an insulating film which buries the conductive wiring in the bottom of the trench isolation. Semiconductor elements are disposed in the active region.

Abstract: A semiconductor device capable of increasing ON current while reducing channel resistance and allowing transistors to operate independently and stably, having a fin formed to protrude from the bottom of a gate electrode trench, a gate insulating film covering the surfaces of the gate electrode trench and the fin, a gate electrode embedded in a lower part of the gate electrode trench and formed to stride over the fin via the gate insulating film, a first impurity diffusion region arranged on a first side face, and a second impurity diffusion region arranged on a second side face.

Abstract: A semiconductor device capable of increasing ON current while reducing channel resistance and allowing transistors to operate independently and stably, having a fin formed to protrude from the bottom of a gate electrode trench, a gate insulating film covering the surfaces of the gate electrode trench and the fin, a gate electrode embedded in a lower part of the gate electrode trench and formed to stride over the fin via the gate insulating film, a first impurity diffusion region arranged on a first side face, and a second impurity diffusion region arranged on a second side face.

Abstract: A semiconductor device comprises a semiconductor substrate; an element-forming region that includes semiconductor elements formed on the semiconductor substrate; a buried electrode plug formed so as to penetrate through the semiconductor substrate; and a trench-type electrode that is buried in a trench within the semiconductor substrate positioned between the element-forming region and the buried electrode plug.