Patents by Inventor Kiyoshi Aiki

Kiyoshi Aiki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10002699
    Abstract: The present invention is to provide a magnet coil drive control device that can efficiently suppress conduction noise while reducing the capacitance of a capacitor. A capacitor and an impedance element are arranged in series on the connecting line connecting the positive electrode line and the negative electrode line of a DC power supply, the connecting line between the capacitor and the impedance element is connected to one end of a magnet coil via a freewheeling diode, and the portion between the freewheeling diode and the one end of the magnet coil is connected to the positive electrode line or the negative electrode line by a switching element. Conduction noise caused by the driving current of the magnet coil can be suppressed by the impedance element, and the capacitance of the capacitor can be further reduced. Accordingly, the magnet coil drive control device can be made smaller in size.
    Type: Grant
    Filed: April 25, 2013
    Date of Patent: June 19, 2018
    Assignee: Hitachi Automotive Systems, Ltd.
    Inventors: Kiyoshi Aiki, Ayumu Hatanaka, Takuya Mayuzumi, Katsuya Oyama, Ryosuke Ishida, Yasushi Sugiyama
  • Patent number: 9714626
    Abstract: An object of this disclosure is to provide a fuel injection device that can reliably detect an operation timing of a valve body, that is, a valve opening timing with high accuracy. The current of an electromagnetic valve reaches I2 at time t3, an FET 201 and an FET 221 are turned on, and a battery voltage VB is applied to the electromagnetic valve until time t5 is reached. The amount of displacement of the valve body reaches a target amount of control lift at time t4 between time t3 and time t5, that is, a movable core 304 comes into contact with a fixed core 301. The detection of the valve opening timing is performed during the period from time t3 to time t5.
    Type: Grant
    Filed: January 24, 2014
    Date of Patent: July 25, 2017
    Assignee: Hitachi Automotive Systems, Ltd.
    Inventors: Ayumu Hatanaka, Ryo Kusakabe, Motoyuki Abe, Toshihiro Aono, Teppei Hirotsu, Hideyuki Sakamoto, Takao Fukuda, Hideharu Ehara, Masahiro Toyohara, Akira Nishioka, Toshio Hori, Kiyoshi Aiki
  • Publication number: 20160071642
    Abstract: The present invention is to provide a magnet coil drive control device that can efficiently suppress conduction noise while reducing the capacitance of a capacitor. A capacitor and an impedance element are arranged in series on the connecting line connecting the positive electrode line and the negative electrode line of a DC power supply, the connecting line between the capacitor and the impedance element is connected to one end of a magnet coil via a freewheeling diode, and the portion between the freewheeling diode and the one end of the magnet coil is connected to the positive electrode line or the negative electrode line by a switching element. Conduction noise caused by the driving current of the magnet coil can be suppressed by the impedance element, and the capacitance of the capacitor can be further reduced. Accordingly, the magnet coil drive control device can be made smaller in size.
    Type: Application
    Filed: April 25, 2013
    Publication date: March 10, 2016
    Inventors: Kiyoshi AIKI, Ayumu HATANAKA, Takuya MAYUZUMI, Katsuya OYAMA, Ryosuke ISHIDA, Yasushi SUGIYAMA
  • Publication number: 20150377176
    Abstract: An object of this disclosure is to provide a fuel injection device that can reliably detect an operation timing of a valve body, that is, a valve opening timing with high accuracy. The current of an electromagnetic valve reaches I2 at time t3, an FET 201 and an FET 221 are turned on, and a battery voltage VB is applied to the electromagnetic valve until time t5 is reached. The amount of displacement of the valve body reaches a target amount of control lift at time t4 between time t3 and time t5, that is, a movable core 304 comes into contact with a fixed core 301. The detection of the valve opening timing is performed during the period from time t3 to time t5.
    Type: Application
    Filed: January 24, 2014
    Publication date: December 31, 2015
    Inventors: Ayumu HATANAKA, Ryo KUSAKABE, Motoyuki ABE, Toshihiro AONO, Teppei HIROTSU, Hideyuki SAKAMOTO, Takao FUKUDA, Hideharu EHARA, Masahiro TOYOHARA, Akira NISHIOKA, Toshio HORI, Kiyoshi AIKI
  • Patent number: 8330596
    Abstract: Provided is a sensor node including: a sensor for measuring biological information; a CPU for acquiring data by driving the sensor; a wireless communication unit for transmitting the data acquired by the CPU; a battery for supplying the control unit, the wireless communication unit, and the sensor with electric power; a RAM for storing the data; a compression unit for compressing the data stored in the RAM when the wireless communication unit cannot carry out the transmission; and a flash memory for storing the compressed data, thereby storing as much sensing data as possible on the sensor node, which is limited in resources, and preventing loss of the sensing data.
    Type: Grant
    Filed: June 4, 2008
    Date of Patent: December 11, 2012
    Assignee: Hitachi, Ltd.
    Inventors: Takeshi Tanaka, Shunzo Yamashita, Kiyoshi Aiki
  • Patent number: 7696867
    Abstract: A sensor node for intermittently sensing data in a short cycle includes a control unit for acquiring information by driving the sensor, a radio communication unit for transmitting the information acquired by the control unit and a battery for supplying the control unit. The control unit includes a clock supply unit (RTC) for supplying the control unit with clocks at a predetermined frequency. A sensor control unit starts the supply of power to the sensor when the measurement period has begun, maintains the power supply to the sensor even if the control unit has shifted to the standby state during the measurement period, and shuts down the power supply to the sensor when the measurement period has been completed. A measurement unit is also provided for acquiring information from the sensor every time the latter has shifted to the operational state.
    Type: Grant
    Filed: July 17, 2007
    Date of Patent: April 13, 2010
    Assignee: Hitachi, Ltd.
    Inventors: Kiyoshi Aiki, Shunzo Yamashita, Takeshi Tanaka
  • Patent number: 7626498
    Abstract: To secure a stable radio-communication performance in a sensor node, the sensor node with a radio-communication circuit and a sensor, for transmitting data measured by the sensor through radio-communication, includes a first board BO2 on which an antenna ANT1 connected to the radio-communication circuit is placed, a case CASE1 containing the first board BO2, and a band that is attached to the case CASE1 so as to fix the case CASE1 to the skin. The antenna ANT1 is placed in an upper portion of the case CASE1, which corresponds to a 12 o'clock direction of a wristwatch.
    Type: Grant
    Filed: August 23, 2005
    Date of Patent: December 1, 2009
    Assignee: Hitachi, Ltd.
    Inventors: Kiyoshi Aiki, Hiroyuki Kuriyama, Shunzo Yamashita, Takanori Shimura
  • Publication number: 20080309481
    Abstract: Provided is a sensor node including: a sensor for measuring biological information; a CPU for acquiring data by driving the sensor; a wireless communication unit for transmitting the data acquired by the CPU; a battery for supplying the control unit, the wireless communication unit, and the sensor with electric power; a RAM for storing the data; a compression unit for compressing the data stored in the RAM when the wireless communication unit cannot carry out the transmission; and a flash memory for storing the compressed data, thereby storing as much sensing data as possible on the sensor node, which is limited in resources, and preventing loss of the sensing data.
    Type: Application
    Filed: June 4, 2008
    Publication date: December 18, 2008
    Inventors: Takeshi Tanaka, Shunzo Yamashita, Kiyoshi Aiki
  • Publication number: 20080055069
    Abstract: A sensor node for intermittently sensing data in a short cycle includes a control unit for acquiring information by driving the sensor, a radio communication unit for transmitting the information acquired by the control unit and a battery for supplying the control unit. The control unit includes a clock supply unit (RTC) for supplying the control unit with clocks at a predetermined frequency. A sensor control unit starts the supply of power to the sensor when the measurement period has begun, maintains the power supply to the sensor even if the control unit has shifted to the standby state during the measurement period, and shuts down the power supply to the sensor when the measurement period has been completed. A measurement unit is also provided for acquiring information from the sensor every time the latter has shifted to the operational state.
    Type: Application
    Filed: July 17, 2007
    Publication date: March 6, 2008
    Inventors: Kiyoshi Aiki, Shunzo Yamashita, Takeshi Tanaka
  • Publication number: 20070191719
    Abstract: The precision of measuring biometric information is enhanced while suppressing the consumption of a battery in a sensor node. In a method of measuring the biometric information in a sensor node including a controller for driving a sensor to measure biometric information, the controller supplies power from a battery to an acceleration sensor for detecting the movement of a living body to detect the movement of the living body, the controller determines whether or not measurement by a pulsebeat sensor is possible based on the detected movement of the living body (P330), and shuts off power to the acceleration sensor having a power consumption lower than that of the pulsebeat sensor when the determination results show that measurement is possible, and thereafter supplying power to the pulsebeat sensor having a power consumption larger than that of the acceleration sensor to measure the biometric information (P340).
    Type: Application
    Filed: March 22, 2007
    Publication date: August 16, 2007
    Inventors: Shunzo Yamashita, Hiroyuki Kuriyama, Kiyoshi Aiki, Takanori Shimura
  • Patent number: 7190593
    Abstract: A semiconductor integrated circuit device is provided in which (i) inspection pads are arranged along one side or two opposite sides of the semiconductor integrated circuit device for bonding pads arranged along the sides other than the side or the two opposite sides and (ii) the bonding pads are connected to their respective inspection pads by connection wires The inspection is carried out by applying probe needles to the pads (inspection pads and bonding pads) arranged only along one side or two opposite sides of the semiconductor integrated circuit device. The invention also provides a semiconductor integrated circuit package with leads on four sides includes a semiconductor integrated circuit device with bonding pads laid along one pair of opposite sides of the four sides, and a table for supporting the semiconductor integrated circuit device.
    Type: Grant
    Filed: December 20, 2001
    Date of Patent: March 13, 2007
    Assignee: Renesas Technology Corporation
    Inventors: Kiyoshi Aiki, Kazunori Hikone, Hiroyuki Adachi, Masayoshi Okamoto, Masao Onose, Yuji Mizuno
  • Publication number: 20070030154
    Abstract: To secure a stable radio-communication performance in a sensor node, the sensor node with a radio-communication circuit and a sensor, for transmitting data measured by the sensor through radio-communication, includes a first board BO2 on which an antenna ANT1 connected to the radio-communication circuit is placed, a case CASE1 containing the first board BO2, and a band that is attached to the case CASE1 so as to fix the case CASE1 to the skin. The antenna ANT1 is placed in an upper portion of the case CASE1, which corresponds to a 12 o'clock direction of a wristwatch.
    Type: Application
    Filed: August 23, 2005
    Publication date: February 8, 2007
    Inventors: Kiyoshi Aiki, Hiroyuki Kuriyama, Shunjo Yamashita, Takanori Shimura
  • Publication number: 20060229520
    Abstract: The precision of measuring biometric information is enhanced while suppressing the consumption of a battery in a sensor node. In a method of measuring the biometric information in a sensor node including a controller for driving a sensor to measure biometric information, the controller supplies power from a battery to an acceleration sensor for detecting the movement of a living body to detect the movement of the living body, the controller determines whether or not measurement by a pulsebeat sensor is possible based on the detected movement of the living body (P330), and shuts off power to the acceleration sensor having a power consumption lower than that of the pulsebeat sensor when the determination results show that measurement is possible, and thereafter supplying power to the pulsebeat sensor having a power consumption larger than that of the acceleration sensor to measure the biometric information (P340).
    Type: Application
    Filed: August 25, 2005
    Publication date: October 12, 2006
    Inventors: Shunzo Yamashita, Hiroyuki Kuriyama, Kiyoshi Aiki, Takanori Shimura
  • Publication number: 20060076934
    Abstract: In a sensor node SN driven by a secondary battery, a charge/discharge control circuit can be realized and an unnecessary circuit in the sensor node can be eliminated for its miniaturization. The charge/discharge control circuit and the sensor node have a comparator for monitoring a battery voltage, a control circuit for converting an output of the comparator into an interrupt signal, a micro controller for performing charge/discharge control only when detecting the interrupt signal, and a switch turned ON or OFF under control of the micro controller. When the battery voltage is not lower than a first predetermined voltage, the switch is turned OFF to thereby stop charging operation. When the battery voltage is not higher than a second predetermined voltage, the switch is turned OFF to stop discharging operation. A circuit necessary in a charge mode is provided in a charger side.
    Type: Application
    Filed: March 7, 2005
    Publication date: April 13, 2006
    Inventors: Yuji Ogata, Shunzo Yamashita, Takanori Shimura, Kiyoshi Aiki
  • Patent number: 6463057
    Abstract: An ATM switching system comprises a switch unit including a plurality of input ports and a plurality of output ports having the same cell transmission rate, and a multiplexer for multiplexing cell trains outputted from at least two output ports into a single cell train and outputting the cell train to a high-speed output line (and/or a demultiplexer for demultiplexing a cell train from an output port into a plurality of cell trains and outputting the cell trains to a plurality of low-speed output lines). The switch unit includes a buffer memory for temporarily storing cells inputted from the input ports while forming a queue chain for each output line to which each cell is to be outputted, a demultiplexer for distributing the cells read from the buffer memory among the output ports in circulation, and a buffer memory control circuit for controlling the write and read operation of cells with the shared buffer memory.
    Type: Grant
    Filed: November 20, 2000
    Date of Patent: October 8, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Takahiko Kozaki, Junichirou Yanagi, Kiyoshi Aiki, Yutaka Ito, Kaoru Aoki, Shinobu Gohara
  • Publication number: 20020117729
    Abstract: A semiconductor integrated circuit device is provided in which (i) inspection pads are arranged along one side or two opposite sides of the semiconductor integrated circuit device for bonding pads arranged along the sides other than the side or the two opposite sides and (ii) the bonding pads are connected to their respective inspection pads by connection wires The inspection is carried out by applying probe needles to the pads (inspection pads and bonding pads) arranged only along one side or two opposite sides of the semiconductor integrated circuit device. The invention also provides a semiconductor integrated circuit package with leads on four sides includes a semiconductor integrated circuit device with bonding pads laid along one pair of opposite sides of the four sides, and a table for supporting the semiconductor integrated circuit device.
    Type: Application
    Filed: December 20, 2001
    Publication date: August 29, 2002
    Inventors: Kiyoshi Aiki, Kazunori Hikone, Hiroyuki Adachi, Masayoshi Okamoto, Masao Onose, Yuji Mizuno
  • Patent number: 6396831
    Abstract: An ATM switching system comprises a switch unit including a plurality of input ports and a plurality of output ports having the same cell transmission rate, and a multiplexer for multiplexing cell trains outputted from at least two output ports into a single cell train and outputting the cell train to a high-speed output line (and/or a demultiplexer for demultiplexing a cell train from an output port into a plurality of cell trains and outputting the cell trains to a plurality of low-speed output lines). The switch unit includes a buffer memory for temporarily storing cells inputted from the input ports while forming a queue chain for each output line to which each cell is to be outputted, a demultiplexer for distributing the cells read from the buffer memory among the output ports in circulation, and a buffer memory control circuit for controlling the write and read operation of cells with the shared buffer memory.
    Type: Grant
    Filed: November 20, 2000
    Date of Patent: May 28, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Takahiko Kozaki, Junichirou Yanagi, Kiyoshi Aiki, Yutaka Ito, Kaoru Aoki, Shinobu Gohara
  • Patent number: 6339596
    Abstract: An ATM switching system comprises a switch unit including a plurality of input ports and a plurality of output ports having the same cell transmission rate, and a multiplexer for multiplexing cell trains outputted from at least two output ports into a single cell train and outputting the cell train to a high-speed output line (and/or a demultiplexer for demultiplexing a cell train from an output port into a plurality of cell trains and outputting the cell trains to a plurality of low-speed output lines). The switch unit includes a buffer memory for temporarily storing cells inputted from the input ports while forming a queue chain for each output line to which each cell is to be outputted, a demultiplexer for distributing the cells read from the buffer memory among the output ports in circulation, and a buffer memory control circuit for controlling the write and read operation of cells with the shared buffer memory.
    Type: Grant
    Filed: August 6, 1997
    Date of Patent: January 15, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Takahiko Kozaki, Junichirou Yanagi, Kiyoshi Aiki, Yutaka Ito, Kaoru Aoki, Shinobu Gohara
  • Patent number: 6330240
    Abstract: An ATM switching system comprises a switch unit including a plurality of input ports and a plurality of output ports having the same cell transmission rate, and a multiplexer for multiplexing cell trains outputted from at least two output ports into a single cell train and outputting the cell train to a high-speed output line (and/or a demultiplexer for demultiplexing a cell train from an output port into a plurality of cell trains and outputting the cell trains to a plurality of low-speed output lines). The switch unit includes a buffer memory for temporarily storing cells inputted from the input ports while forming a queue chain for each output line to which each cell is to be outputted, a demultiplexer for distributing the cells read from the buffer memory among the output ports in circulation, and a buffer memory control circuit for controlling the write and read operation of cells with the shared buffer memory.
    Type: Grant
    Filed: July 12, 1999
    Date of Patent: December 11, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Takahiko Kozaki, Junichirou Yanagi, Kiyoshi Aiki, Yutaka Ito, Kaoru Aoki
  • Publication number: 20010043597
    Abstract: An ATM switching system comprises a switch unit including a plurality of input ports and a plurality of output ports having the same cell transmission rate, and a multiplexer for multiplexing cell trains outputted from at least two output ports into a single cell train and outputting the cell train to a high-speed output line (and/or a demultiplexer for demultiplexing a cell train from an output port into a plurality of cell trains and outputting the cell trains to a plurality of low-speed output lines). The switch unit includes a buffer memory for temporarily storing cells inputted from the input ports while forming a queue chain for each output line to which each cell is to be outputted, a demultiplexer for distributing the cells read from the buffer memory among the output ports in circulation, and a buffer memory control circuit for controlling the write and read operation of cells with the shared buffer memory.
    Type: Application
    Filed: September 8, 1997
    Publication date: November 22, 2001
    Inventors: TAKAHIKO KOZAKI, JUNICHIROU YANAGI, KIYOSHI AIKI, YUTAKA ITO, KAORU AOKI, SHINOBU GOHARA