Patents by Inventor Kiyoshi Fukushima

Kiyoshi Fukushima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6604214
    Abstract: In an one-chip microcomputer used in an automobile, error correction code data is added to corresponding user data, and then the resulting user data is stored into an EEPROM to correct an 1-bit error contained in this user data. The one-chip microcomputer is arranged by an electrically erasable memory for temporarily storing thereinto externally supplied user data and ECC (error correction code) data corresponding to the user data; a program storage memory for previously storing thereinto a program; and a CPU (central processing unit) for reading the program from the program storage memory so as to produce the ECC data based upon the externally supplied user data, and for sequentially correcting errors contained in the externally supplied user data by using the produced ECC data corresponding to the externally supplied user data.
    Type: Grant
    Filed: April 6, 1999
    Date of Patent: August 5, 2003
    Assignee: NEC Electronics Corporation
    Inventor: Kiyoshi Fukushima
  • Patent number: 6487700
    Abstract: Herein disclosed is a semiconductor device simulation apparatus which is set the various parameters to be used for measuring a current value and a voltage value that varies depending on the internal resistance of a DUT, and simulates a current value or a voltage value that varies depending on an internal resistance of a DUT in accordance with various parameters and a prescribed test signal when receiving the test signal. Also disclosed is a semiconductor test program debugging apparatus using such a semiconductor device simulating apparatus.
    Type: Grant
    Filed: March 8, 2000
    Date of Patent: November 26, 2002
    Assignee: Advantest Corporation
    Inventor: Kiyoshi Fukushima
  • Patent number: 6190618
    Abstract: A garbage processor has a vessel for receiving garbage, a rotary pulverizer/stirrer for crushing and stirring the garbage in the vessel and a first heater for drying the garbage in the vessel. A steam is generated upon heating and drying of the garbage. An air blower feeds a high pressure an ambient air into the vessel to force the steam out of the vessel. A steam separator is provided for separating the steam into a water and a gas. A second heater is provided downstream of the steam separator for oxidizing the gas emanating from the steam separator to reduce a smell of the gas. The gas is deodorized before it is discharged to the atmosphere.
    Type: Grant
    Filed: September 1, 1999
    Date of Patent: February 20, 2001
    Assignee: Jidosha Buhin Kogyo Co., Ltd
    Inventors: Tadaaki Nekozuka, Kiyoshi Fukushima, Hirohide Nakao, Tomio Terayama, Akihiro Shirata, Sinichiro Fujita, Kenichi Ueda, Masami Hatayama, Hiroshi Ohdate
  • Patent number: 5980823
    Abstract: A garbage processor has a vessel for receiving garbage, a rotary pulverizer/stirrer for crushing and stirring the garbage in the vessel and a first heater for drying the garbage in the vessel. Steam is generated upon heating and drying of the garbage. An air blower feeds high pressure ambient air into the vessel to force the steam out of the vessel. A steam separator is provided for separating the steam into water and a gas. A second heater is provided downstream of the steam separator for oxidizing the gas emanating from the steam separator to reduce the smell of the gas. The gas is deodorized before it is discharged to the atmosphere.
    Type: Grant
    Filed: May 20, 1997
    Date of Patent: November 9, 1999
    Assignee: Jidosha Buhin Kogyo Co., Ltd.
    Inventors: Tadaaki Nekozuka, Kiyoshi Fukushima, Hirohide Nakao, Tomio Terayama, Akihiro Shirata, Sinichiro Fujita, Kenichi Ueda, Masami Hatayama, Hiroshi Ohdate
  • Patent number: 5951704
    Abstract: An emulator software in a semiconductor test system for emulating hardware in the semiconductor test system as well as a semiconductor device to be tested without need to use an actual test system hardware. The emulator software includes an emulator unit which emulates a function of each hardware unit of the test system, a device emulator which emulates a function of a semiconductor device to be tested, a data collecting part for acquiring data from the emulator unit necessary for carrying out a test program, and a device test emulator which generates a test signal to be applied to the device emulator based on the acquired data and compares the resultant signal from the device emulator with the expected data and stores the comparison result therein.
    Type: Grant
    Filed: February 19, 1997
    Date of Patent: September 14, 1999
    Assignee: Advantest Corp.
    Inventors: Robert F. Sauer, Kiyoshi Fukushima, Hiroaki Yamoto
  • Patent number: 5929500
    Abstract: A light receiving element is comprised of a light sensitive surface on a semiconductor substrate and a positive electrode (anode), a negative electrode (cathode), a mounting precision test mask, a conductive electrode wire, and solder resist on the same substrate surface. A metal thin film, a mounting alignment mark, and a mounting precision mark window are provided on the back side of the substrate. Two or more electrode surfaces having either the anode or the cathode used as the common electrode are provided. The light sensitive surface is positioned approximately in the center between these two electrode surfaces. A highly precise mounting can therefore be achieved with the solder bump, even when mounting single light receiving elements. High precision mounting is also obtained when mounting light receiving element arrays. This type of light receiving element can be precisely positioned and bonded by solder bumps to a substrate having an optical fiber fitted in the V groove.
    Type: Grant
    Filed: February 19, 1997
    Date of Patent: July 27, 1999
    Assignee: NEC Corporation
    Inventors: Isao Yoneda, Kiyoshi Fukushima, Junichi Sasaki, Hiroshi Honmou, Masataka Itoh
  • Patent number: 5764075
    Abstract: In order to provide an input circuit for mode setting with a simple configuration sufficiently stable and without unnecessary current consumption, the input circuit of the invention, for outputting a control signal (MODE OUT) according to a status of a mode setting terminal (I1), comprises latch means (100) being reset with a rising edge of a reset signal (RES) to output the control signal (MODE OUT) of logic LOW and latching logic of the mode setting terminal (I1) with a falling edge of a delayed signal (RESD) of said reset signal (RES) for maintaining to output inverse or the same logic of said logic of the mode setting terminal (I1) latched, and pull-up or pull-down means (P1) becoming ON for pulling up or down the mode setting terminal (I1) to logic HIGH or LOW when the mode setting terminal (I1) is left open gated by logic LOW of the control signal (MODE OUT) and becoming OFF for cutting a current flowing through the mode setting terminal (I1) gated by logic HIGH of the control signal (MODE OUT).
    Type: Grant
    Filed: October 24, 1996
    Date of Patent: June 9, 1998
    Assignee: NEC Corporation
    Inventor: Kiyoshi Fukushima
  • Patent number: 5506806
    Abstract: An erasable programmable read-only memory (EPROM) includes a plurality of EPROM cells arranged in a matrix having a plurality of rows and a plurality of columns, and a plurality of digit lines each connected in common to drains of the EPROM cells included in a corresponding one column of EPROM cells. A Y-selector receives a Y-address of a given address for selecting one digit line of the digit lines so as to connect the selected digit line to a sense amplifier. Each of the digit lines is connected to one of reading-inhibition circuits having a reading-inhibition information storing EPROM cell, so that when the reading-inhibition information storing EPROM cell of the reading-inhibition circuits are in a written condition, the digit line is forcibly maintained at a predetermined logic level. The EPROM can inhibit the reading of any bit or bits and any area of an EPROM.
    Type: Grant
    Filed: September 20, 1994
    Date of Patent: April 9, 1996
    Assignee: NEC Corporation
    Inventor: Kiyoshi Fukushima
  • Patent number: 5483804
    Abstract: A defrost control apparatus for refrigerator includes a microcomputer which counts the number of opening/closing times of a door of a storage room for each of time zones within a day so as to set indexes for every time zones on the basis of the number of opening/closing times. The microcomputer also counts operating hours of a compressor and total elapsed hours, and determines a sudden phenomenon and a season. The microcomputer further selectively fetches the indexes, and generates a single index by joining a plurality of indexes so as to apply the same to a neural network included in a defrost signal generating unit. The neural network generates a defrost on/off signal on the basis of inputted data. In addition, if feature amounts are generated on the basis of the indexes by a feature detecting unit, the neural network generates the defrost on/off signal on the basis of the feature amounts.
    Type: Grant
    Filed: March 28, 1994
    Date of Patent: January 16, 1996
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Atsushi Ogawa, Yoshio Ozawa, Toshimichi Hirata, Tsuyoshi Kawai, Kiyoshi Fukushima, Masashi Toyoshima
  • Patent number: 5465579
    Abstract: An apparatus for compressing/expanding a working gas (compression/expansion apparatus), including: a cylinder; a piston for compressing/expanding said working gas in a working space (front space) of said cylinder; a crank mechanism connected with a piston rod of said piston via an oil seal; a crank chamber for housing therein said crank mechanism and communicating with said cylinder via said oil seal, said apparatus comprising: a first tube allowing for a unidirectional flow of the working gas from said crank chamber to said front space in said cylinder, said first tube having therein an oil filter and a first check valve; and a second tube allowing for a unidirectional flow of the working gas from said front space to a second space (rear space) behind said piston in said cylinder, said second tube having therein a second check valve.
    Type: Grant
    Filed: May 6, 1994
    Date of Patent: November 14, 1995
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Fusao Terada, Takashi Nakazato, Rikio Tadano, Naohide Tanigawa, Tatuya Hirose, Kazuo Ikegami, Kiyoshi Fukushima
  • Patent number: 5392301
    Abstract: A programmable read only memory device comprises a first memory unit for data codes, a second memory unit for parity codes, and an error checking and correction unit for retrieving an original data code from the data code and the associated parity code, wherein a test data code and an improper or proper parity code is supplied from a test data register to the error checking and correction unit so that not only the data checking circuit but also the data correction circuit are examined to see if or not any trouble takes place therein.
    Type: Grant
    Filed: March 27, 1992
    Date of Patent: February 21, 1995
    Assignee: NEC Corporation
    Inventor: Kiyoshi Fukushima
  • Patent number: 5389926
    Abstract: Disclosed herein is a microcomputer having a test circuit for an A/D converter of a C/R type. This converter includes a resistor circuit having a plurality of resistors connected in series between reference potential points to generate a changeable reference voltage and a capacitor circuit having a plurality of capacitors for storing electrical charges relative to an analog input voltage and to the changeable reference voltage, and the test circuit is coupled to the resistor circuit and the capacitor circuit and further to first and second terminals and activated in a test mode to transfer the changeable reference voltage to the first terminal and another reference voltage, which is produced outside the microcomputer, to the capacitor circuit.
    Type: Grant
    Filed: July 15, 1993
    Date of Patent: February 14, 1995
    Assignee: NEC Corporation
    Inventor: Kiyoshi Fukushima
  • Patent number: 5336524
    Abstract: A method of applying to surfaces of component parts of an evaporator hydrophilic coatings which do not emit offensive odors under operating conditions, or at other times. The method provides coatings in which water glass and colloidal silica are attached to the surfaces in the form of solids in an amount of 0.010 to 0.066 g/m.sup.2.
    Type: Grant
    Filed: December 30, 1992
    Date of Patent: August 9, 1994
    Assignee: Diesel Kiki Co., Ltd.
    Inventors: Noriyuki Tanaka, Takashi Takishita, Kiyoshi Fukushima, Yasuyuki Nagakura, Kaoru Inoue, Tsuyoshi Nishijima, Haruhiro Inada
  • Patent number: 5126944
    Abstract: A CPU includes a program counter, an execution unit, and a program status word register. A pulse producing unit connected to the CPU includes a plurality of output terminals, a port selection register for designating at least one of the output terminals, and a system for generating a pulse start timing signal, a system responsive to the pulse start timing signal for bringing the designated output terminal into one of two bistable logic states. A counter counts a clock pulse signal and brings the selected output terminal into the other of the bistable logic states when the counter indicates a predetermined elapsed time. Another system responsive to the pulse start timing signal sends a signal to the CPU requesting a macro service operation.
    Type: Grant
    Filed: November 17, 1989
    Date of Patent: June 30, 1992
    Assignee: NEC Corporation
    Inventors: Hajime Sakuma, Yukio Maehashi, Kiyoshi Fukushima, Takashi Miyazaki, Hisaharu Oba
  • Patent number: 4499238
    Abstract: Various resin products having beautiful pearl-like pattern or luster and excellent mechanical strength such as impact strength and hinging properties are produced by molding a mixture of styrene-butadiene block copolymer containing 10 to 35 wt % butadiene and 65 to 90 wt % styrene, showing resinous properties, and having a specific block form and crystalline polypropylene (content of the former copolymer: 25 to 95 wt %).
    Type: Grant
    Filed: January 24, 1983
    Date of Patent: February 12, 1985
    Assignees: Nippon Steel Chemical Co., Ltd., Sumitomo Chemical Company, Limited
    Inventors: Nobutoshi Iwata, Kiyoshi Fukushima, Shinji Fujino, Takeshiro Yamada, Hideyuki Hao, Shigeo Tanaka, Tatsuyuki Mitsuno
  • Patent number: 4380018
    Abstract: An on-demand type ink jet printer, and an ink droplet projecting device used in this printer are disclosed. This device operates in the following way: a piezo-electric element transmits the pressure generated by its vibration first to the pressure transmitting medium of a non-solid matter; through this medium, the pressure is transmitted to the passive vibrating means being in contact with the ink to be projected, and facing the orifice through which ink is projected, thereby vibrating this vibrating means, and by the pressure generated by the vibration, ink is projected through the orifice. With such a structure, the assembling work of this device is easy; uniform projection characteristics are achieved, and moreover, the problem of air suction with resultant projection failure is eliminated.
    Type: Grant
    Filed: June 10, 1981
    Date of Patent: April 12, 1983
    Assignee: Sanyo Denki Kabushiki Kaisha
    Inventors: Sadanari Andoh, Junji Maeda, Kiyoshi Fukushima, Hiroichi Yoneda, Naotomo Jinushi
  • Patent number: 4353299
    Abstract: An automatic control system for an offset printing machine includes a process execution instructions generating circuit having latched therein instructions for executing various operation processes and adapted to shift from one operation phase to another for successively generating process execution instructions, so that an ink forming and master plate feeding process, an inking process, a transfer-printing process, a printing process, and a master plate ejecting and cleaning process can be automatically executed in correct order. The number of times for executing each of the etching, inking, transfer-printing and cleaning processes can be adjusted in a process setting structure. When a master plate feeding error detecting signal is generated, the process execution instructions generating circuit is reset to an initial condition of stop instructions which prevailed prior to actuation of a start switch.
    Type: Grant
    Filed: January 16, 1981
    Date of Patent: October 12, 1982
    Assignee: Ricoh Co., Ltd.
    Inventors: Kazuo Murai, Kenji Hashimoto, Kiyoshi Fukushima, Sumio Suzuki
  • Patent number: 4153231
    Abstract: Mould assembly for foam moulding of plastic materials, which comprises stationary and movable dies and an auxiliary die plate device between the stationary and movable dies. A gas passage is formed for introducing pressurized inert gas into the mould cavity. The auxiliary die device comprises separated inner and outer auxiliary dies both being spring biased toward the stationary die. O-ring seals are disposed between the opposite surfaces of the outer auxiliary die and the stationary and movable dies.
    Type: Grant
    Filed: November 3, 1977
    Date of Patent: May 8, 1979
    Assignee: Nippon Steel Chemical Co., Ltd.
    Inventors: Akifumi Hayakawa, Akira Aiba, Eiki Orihara, Kiyoshi Fukushima
  • Patent number: 4133858
    Abstract: This invention relates to an improved injection foam molding method in which a foamable mixture of molten synthetic polymer resin and a chemical blowing agent in unfoamed condition is injected into a gas-pressurized expandable mold having a mold section movable for expanding the mold cavity to a position in which the surface of that section is in registry to the surface of another mold section, in which process the mold is filled under conditions resisting foaming of the material prior to filling of the mold and a novel controlled time sequence effective to form a fine mold crease line is employed in releasing the gas pressure and expanding the mold to allow foaming of the mixture into conformity with the mold surface.
    Type: Grant
    Filed: December 14, 1977
    Date of Patent: January 9, 1979
    Assignee: USM Corporation
    Inventors: Akifumi Hayakawa, Akira Aiba, Eiki Orihara, Kiyoshi Fukushima