Patents by Inventor Kiyoshi Hirata

Kiyoshi Hirata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9799691
    Abstract: Channel stop sections formed by multiple times of impurity ion implanting processes. Four-layer impurity regions are formed across the depth of a semiconductor substrate (across the depth of the bulk), so that a P-type impurity region is formed deep in the semiconductor substrate; thus, incorrect movement of electric charges is prevented. Other four-layer impurity regions of another channel stop section are decreased in width step by step across the depth of the substrate, so that the reduction of a charge storage region of a light receiving section due to the dispersion of P-type impurity in the channel stop section is prevented in the depth of the substrate.
    Type: Grant
    Filed: October 18, 2016
    Date of Patent: October 24, 2017
    Assignee: Sony Corporation
    Inventor: Kiyoshi Hirata
  • Publication number: 20170040366
    Abstract: Channel stop sections formed by multiple times of impurity ion implanting processes. Four-layer impurity regions are formed across the depth of a semiconductor substrate (across the depth of the bulk), so that a P-type impurity region is formed deep in the semiconductor substrate; thus, incorrect movement of electric charges is prevented. Other four-layer impurity regions of another channel stop section are decreased in width step by step across the depth of the substrate, so that the reduction of a charge storage region of a light receiving section due to the dispersion of P-type impurity in the channel stop section is prevented in the depth of the substrate.
    Type: Application
    Filed: October 18, 2016
    Publication date: February 9, 2017
    Inventor: Kiyoshi Hirata
  • Patent number: 9520432
    Abstract: Channel stop sections formed by multiple times of impurity ion implanting processes. Four-layer impurity regions are formed across the depth of a semiconductor substrate (across the depth of the bulk), so that a P-type impurity region is formed deep in the semiconductor substrate; thus, incorrect movement of electric charges is prevented. Other four-layer impurity regions of another channel stop section are decreased in width step by step across the depth of the substrate, so that the reduction of a charge storage region of a light receiving section due to the dispersion of P-type impurity in the channel stop section is prevented in the depth of the substrate.
    Type: Grant
    Filed: August 27, 2015
    Date of Patent: December 13, 2016
    Assignee: Sony Corporation
    Inventor: Kiyoshi Hirata
  • Publication number: 20150372032
    Abstract: Channel stop sections formed by multiple times of impurity ion implanting processes. Four-layer impurity regions are formed across the depth of a semiconductor substrate (across the depth of the bulk), so that a P-type impurity region is formed deep in the semiconductor substrate; thus, incorrect movement of electric charges is prevented. Other four-layer impurity regions of another channel stop section are decreased in width step by step across the depth of the substrate, so that the reduction of a charge storage region of a light receiving section due to the dispersion of P-type impurity in the channel stop section is prevented in the depth of the substrate.
    Type: Application
    Filed: August 27, 2015
    Publication date: December 24, 2015
    Inventor: Kiyoshi Hirata
  • Patent number: 9159855
    Abstract: Channel stop sections formed by multiple times of impurity ion implanting processes. Four-layer impurity regions are formed across the depth of a semiconductor substrate (across the depth of the bulk), so that a P-type impurity region is formed deep in the semiconductor substrate; thus, incorrect movement of electric charges is prevented. Other four-layer impurity regions of another channel stop section are decreased in width step by step across the depth of the substrate, so that the reduction of a charge storage region of a light receiving section due to the dispersion of P-type impurity in the channel stop section is prevented in the depth of the substrate.
    Type: Grant
    Filed: June 19, 2014
    Date of Patent: October 13, 2015
    Assignee: SONY CORPORATION
    Inventor: Kiyoshi Hirata
  • Publication number: 20140299921
    Abstract: Channel stop sections formed by multiple times of impurity ion implanting processes. Four-layer impurity regions are formed across the depth of a semiconductor substrate (across the depth of the bulk), so that a P-type impurity region is formed deep in the semiconductor substrate; thus, incorrect movement of electric charges is prevented. Other four-layer impurity regions of another channel stop section are decreased in width step by step across the depth of the substrate, so that the reduction of a charge storage region of a light receiving section due to the dispersion of P-type impurity in the channel stop section is prevented in the depth of the substrate.
    Type: Application
    Filed: June 19, 2014
    Publication date: October 9, 2014
    Inventor: Kiyoshi Hirata
  • Patent number: 8816416
    Abstract: Channel stop sections formed by multiple times of impurity ion implanting processes. Four-layer impurity regions are formed across the depth of a semiconductor substrate (across the depth of the bulk), so that a P-type impurity region is formed deep in the semiconductor substrate; thus, incorrect movement of electric charges is prevented. Other four-layer impurity regions of another channel stop section are decreased in width step by step across the depth of the substrate, so that the reduction of a charge storage region of a light receiving section due to the dispersion of P-type impurity in the channel stop section is prevented in the depth of the substrate.
    Type: Grant
    Filed: April 3, 2013
    Date of Patent: August 26, 2014
    Assignee: Sony Corporation
    Inventor: Kiyoshi Hirata
  • Patent number: 8598640
    Abstract: A solid-state imaging device with a structure such that an electrode for reading a signal charge is provided on one side of a light-receiving sensor portion constituting a pixel; a predetermined voltage signal V is applied to a light-shielding film formed to cover an image pickup area except the light-receiving sensor portion; a second-conductivity-type semiconductor area is formed in the center on the surface of a first-conductivity-type semiconductor area constituting a photo-electric conversion area of the light-receiving sensor portion; and areas containing a lower impurity concentration than that of the second-conductivity-type semiconductor area is formed on the surface of the first-conductivity-type semiconductor area at the end on the side of the electrode and at the opposite end on the side of a pixel-separation area.
    Type: Grant
    Filed: August 17, 2011
    Date of Patent: December 3, 2013
    Assignee: Sony Corporation
    Inventors: Yoshiaki Kitano, Hideshi Abe, Jun Kuroiwa, Kiyoshi Hirata, Hiroaki Ohki, Nobuhiro Karasawa, Ritsuo Takizawa, Mitsuru Yamashita, Mitsuru Sato, Katsunori Kokubun
  • Patent number: 8431976
    Abstract: Channel stop sections formed by multiple times of impurity ion implanting processes. Four-layer impurity regions are formed across the depth of a semiconductor substrate (across the depth of the bulk) so that a P-type impurity region is formed deep in the semiconductor substrate; thus, incorrect movement of electric charges is prevented. Other four-layer impurity regions of another channel stop section are decreased in width step by step across the depth of the substrate, so that the reduction of a charge storage region of a light receiving section due to the dispersion of P-type impurity in the channel stop section is prevented in the depth of the substrate.
    Type: Grant
    Filed: January 12, 2012
    Date of Patent: April 30, 2013
    Assignee: Sony Corporation
    Inventor: Kiyoshi Hirata
  • Publication number: 20120104533
    Abstract: Channel stop sections formed by multiple times of impurity ion implanting processes. Four-layer impurity regions are formed across the depth of a semiconductor substrate (across the depth of the bulk) so that a P-type impurity region is formed deep in the semiconductor substrate; thus, incorrect movement of electric charges is prevented. Other four-layer impurity regions of another channel stop section are decreased in width step by step across the depth of the substrate, so that the reduction of a charge storage region of a light receiving section due to the dispersion of P-type impurity in the channel stop section is prevented in the depth of the substrate.
    Type: Application
    Filed: January 12, 2012
    Publication date: May 3, 2012
    Applicant: Sony Corporation
    Inventor: Kiyoshi Hirata
  • Patent number: 8115268
    Abstract: Channel stop sections formed by multiple times of impurity ion implanting processes. Four-layer impurity regions are formed across the depth of a semiconductor substrate (across the depth of the bulk), so that a P-type impurity region is formed deep in the semiconductor substrate; thus, incorrect movement of electric charges is prevented. Other four-layer impurity regions of another channel stop section are decreased in width step by step across the depth of the substrate, so that the reduction of a charge storage region of a light receiving section due to the dispersion of P-type impurity in the channel stop section is prevented in the depth of the substrate.
    Type: Grant
    Filed: August 7, 2009
    Date of Patent: February 14, 2012
    Assignee: Sony Corporation
    Inventor: Kiyoshi Hirata
  • Publication number: 20110298024
    Abstract: A solid-state imaging device with a structure such that an electrode for reading a signal charge is provided on one side of a light-receiving sensor portion constituting a pixel; a predetermined voltage signal V is applied to a light-shielding film formed to cover an image pickup area except the light-receiving sensor portion; a second-conductivity-type semiconductor area is formed in the center on the surface of a first-conductivity-type semiconductor area constituting a photo-electric conversion area of the light-receiving sensor portion; and areas containing a lower impurity concentration than that of the second-conductivity-type semiconductor area is formed on the surface of the first-conductivity-type semiconductor area at the end on the side of the electrode and at the opposite end on the side of a pixel-separation area.
    Type: Application
    Filed: August 17, 2011
    Publication date: December 8, 2011
    Applicant: SONY CORPORATION
    Inventors: Yoshiaki Kitano, Hideshi Abe, Jun Kuroiwa, Kiyoshi Hirata, Hiroaki Ohki, Nobuhiro Karasawa, Ritsuo Takizawa, Mitsuru Yamashita, Mitsuru Sato, Katsunori Kokubun
  • Patent number: 8017984
    Abstract: A solid-state imaging device with a structure such that an electrode for reading a signal charge is provided on one side of a light-receiving sensor portion constituting a pixel; a predetermined voltage signal V is applied to a light-shielding film formed to cover an image pickup area except the light-receiving sensor portion; a second-conductivity-type semiconductor area is formed in the center on the surface of a first-conductivity-type semiconductor area constituting a photo-electric conversion area of the light-receiving sensor portion; and areas containing a lower impurity concentration than that of the second-conductivity-type semiconductor area is formed on the surface of the first-conductivity-type semiconductor area at the end on the side of the electrode and at the opposite end on the side of a pixel-separation area.
    Type: Grant
    Filed: November 25, 2008
    Date of Patent: September 13, 2011
    Assignee: Sony Corporation
    Inventors: Yoshiaki Kitano, Hideshi Abe, Jun Kuroiwa, Kiyoshi Hirata, Hiroaki Ohki, Nobuhiro Karasawa, Ritsuo Takizawa, Mitsuru Yamashita, Mitsuru Sato, Katsunori Kokubun
  • Patent number: 7935563
    Abstract: A solid-state imaging device with a structure such that an electrode for reading a signal charge is provided on one side of a light-receiving sensor portion constituting a pixel; a predetermined voltage signal V is applied to a light-shielding film formed to cover an image pickup area except the light-receiving sensor portion; a second-conductivity-type semiconductor area is formed in the center on the surface of a first-conductivity-type semiconductor area constituting a photo-electric conversion area of the light-receiving sensor portion; and areas containing a lower impurity concentration than that of the second-conductivity-type semiconductor area is formed on the surface of the first-conductivity-type semiconductor area at the end on the side of the electrode and at the opposite end on the side of a pixel-separation area.
    Type: Grant
    Filed: November 25, 2008
    Date of Patent: May 3, 2011
    Assignee: Sony Corporation
    Inventors: Yoshiaki Kitano, Hideshi Abe, Jun Kuroiwa, Kiyoshi Hirata, Hiroaki Ohki, Nobuhiro Karasawa, Ritsuo Takizawa, Mitsuru Yamashita, Mitsuru Sato, Katsunori Kokubun
  • Patent number: 7928487
    Abstract: A solid-state imaging device having an electrode for reading a signal charge is provided on one side of a light-receiving sensor portion constituting a pixel; a predetermined voltage signal applied to a light-shielding film formed to cover an image pickup area except the light-receiving sensor portion; a second-conductivity-type semiconductor area formed in the center on the surface of a first-conductivity-type semiconductor area constituting a photo-electric conversion area of the light-receiving sensor portion; and areas containing a lower impurity concentration than that of the second-conductivity-type semiconductor area formed on the surface of the first-conductivity-type semiconductor area at the end on the side of the electrode and at the opposite end on the side of a pixel-separation area.
    Type: Grant
    Filed: August 28, 2008
    Date of Patent: April 19, 2011
    Assignee: Sony Corporation
    Inventors: Yoshiaki Kitano, Hideshi Abe, Jun Kuroiwa, Kiyoshi Hirata, Hiroaki Ohki, Nobuhiro Karasawa, Ritsuo Takizawa, Mitsuru Yamashita, Mitsuru Sato, Katsunori Kokubun
  • Patent number: 7821093
    Abstract: A solid-state imaging device with a structure such that an electrode for reading a signal charge is provided on one side of a light-receiving sensor portion constituting a pixel; a predetermined voltage signal V is applied to a light-shielding film formed to cover an image pickup area except the light-receiving sensor portion; a second-conductivity-type semiconductor area is formed in the center on the surface of a first-conductivity-type semiconductor area constituting a photo-electric conversion area of the light-receiving sensor portion; and areas containing a lower impurity concentration than that of the second-conductivity-type semiconductor area is formed on the surface of the first-conductivity-type semiconductor area at the end on the side of the electrode and at the opposite end on the side of a pixel-separation area.
    Type: Grant
    Filed: November 25, 2008
    Date of Patent: October 26, 2010
    Assignee: Sony Corporation
    Inventors: Yoshiaki Kitano, Hideshi Abe, Jun Kuroiwa, Kiyoshi Hirata, Hiroaki Ohki, Nobuhiro Karasawa, Ritsuo Takizawa, Mitsuru Yamashita, Mitsuru Sato, Katsunori Kokubun
  • Patent number: 7791118
    Abstract: A solid-state imaging device with a structure such that an electrode for reading a signal charge is provided on one side of a light-receiving sensor portion constituting a pixel; a predetermined voltage signal V is applied to a light-shielding film formed to cover an image pickup area except the light-receiving sensor portion; a second-conductivity-type semiconductor area is formed in the center on the surface of a first-conductivity-type semiconductor area constituting a photo-electric conversion area of the light-receiving sensor portion; and areas containing a lower impurity concentration than that of the second-conductivity-type semiconductor area is formed on the surface of the first-conductivity-type semiconductor area at the end on the side of the electrode and at the opposite end on the side of a pixel-separation area.
    Type: Grant
    Filed: November 25, 2008
    Date of Patent: September 7, 2010
    Assignee: Sony Corporation
    Inventors: Yoshiaki Kitano, Hideshi Abe, Jun Kuroiwa, Kiyoshi Hirata, Hiroaki Ohki, Nobuhiro Karasawa, Ritsuo Takizawa, Mitsuru Yamashita, Mitsuru Sato, Katsunori Kokubun
  • Patent number: 7642614
    Abstract: Channel stop sections are formed by multiple times of impurity ion implanting processes. Four-layer impurity regions are formed across the depth of a semiconductor substrate (across the depth of the bulk), so that a P-type impurity region is formed deep in the semiconductor substrate; thus, incorrect movement of electric charges is prevented. Other four-layer impurity regions of another channel stop section are decreased in width step by step across the depth of the substrate, so that the reduction of a charge storage region of a light receiving section due to the dispersion of P-type impurity in the channel stop section is prevented in the depth of the substrate.
    Type: Grant
    Filed: February 21, 2007
    Date of Patent: January 5, 2010
    Assignee: Sony Corporation
    Inventor: Kiyoshi Hirata
  • Publication number: 20090294884
    Abstract: Channel stop sections formed by multiple times of impurity ion implanting processes. Four-layer impurity regions are formed across the depth of a semiconductor substrate (across the depth of the bulk), so that a P-type impurity region is formed deep in the semiconductor substrate; thus, incorrect movement of electric charges is prevented. Other four-layer impurity regions of another channel stop section are decreased in width step by step across the depth of the substrate, so that the reduction of a charge storage region of a light receiving section due to the dispersion of P-type impurity in the channel stop section is prevented in the depth of the substrate.
    Type: Application
    Filed: August 7, 2009
    Publication date: December 3, 2009
    Applicant: SONY CORPORATION
    Inventor: Kiyoshi Hirata
  • Publication number: 20090078977
    Abstract: A solid-state imaging device with a structure such that an electrode for reading a signal charge is provided on one side of a light-receiving sensor portion constituting a pixel; a predetermined voltage signal V is applied to a light-shielding film formed to cover an image pickup area except the light-receiving sensor portion; a second-conductivity-type semiconductor area is formed in the center on the surface of a first-conductivity-type semiconductor area constituting a photo-electric conversion area of the light-receiving sensor portion; and areas containing a lower impurity concentration than that of the second-conductivity-type semiconductor area is formed on the surface of the first-conductivity-type semiconductor area at the end on the side of the electrode and at the opposite end on the side of a pixel-separation area.
    Type: Application
    Filed: November 25, 2008
    Publication date: March 26, 2009
    Applicant: SONY CORPORATION
    Inventors: Yoshiaki Kitano, Hideshi Abe, Jun Kuroiwa, Kiyoshi Hirata, Hiroaki Ohki, Nobuhiro Karasawa, Ritsuo Takizawa, Mitsuru Yamashita, Mitsuru Sato, Katsunori Kokubun