Patents by Inventor Kiyoshi IKENISHI

Kiyoshi IKENISHI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9473118
    Abstract: A semiconductor device including: a plurality of function block units each including a plurality of latch circuits; a current prediction unit that predicts a variation amount of current consumed by each of the function block units; an operation control unit that, if any of the variation amounts predicted by the current prediction unit exceeds a threshold value, operates the latch circuits included in a predetermined number of target function block units for a predetermined period, the predetermined number of target function block units being chosen from function block units not operating among the plurality of function block units; and a restore control unit that, after the predetermined period passes, restores information held by the latch circuits included in the predetermined number of target function block units, to information held by the latch circuits before the operation for the predetermined period.
    Type: Grant
    Filed: August 19, 2015
    Date of Patent: October 18, 2016
    Assignee: FUJITSU LIMITED
    Inventor: Kiyoshi Ikenishi
  • Publication number: 20160072483
    Abstract: A semiconductor device including: a plurality of function block units each including a plurality of latch circuits; a current prediction unit that predicts a variation amount of current consumed by each of the function block units; an operation control unit that, if any of the variation amounts predicted by the current prediction unit exceeds a threshold value, operates the latch circuits included in a predetermined number of target function block units for a predetermined period, the predetermined number of target function block units being chosen from function block units not operating among the plurality of function block units; and a restore control unit that, after the predetermined period passes, restores information held by the latch circuits included in the predetermined number of target function block units, to information held by the latch circuits before the operation for the predetermined period.
    Type: Application
    Filed: August 19, 2015
    Publication date: March 10, 2016
    Inventor: Kiyoshi IKENISHI
  • Publication number: 20140089884
    Abstract: A disclosed design support method includes: dividing an circuit element that is included in a circuit to be designed and is provided on a path that connects between memory circuits into plural circuit elements, based on information concerning circuit elements that can be divided into circuit elements; tracing the path from the memory circuits; and during the tracing, setting a new power supply voltage that is lowed by a predetermined voltage from a voltage, which was set immediately before, to a traced circuit element, which is provided on the path and satisfies a predetermined condition concerning a predetermined lower limit voltage of the traced circuit element.
    Type: Application
    Filed: July 11, 2013
    Publication date: March 27, 2014
    Inventor: Kiyoshi IKENISHI