Patents by Inventor Kiyoshi Irino

Kiyoshi Irino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7679737
    Abstract: A method of inspecting defects on an object includes irradiating predetermined particles with a laser beam to measure first scattered light intensities, irradiating plural types of defects with the laser beam to measure second scattered light intensities, determining types of some defects selected out of the plural types of defects using the first scattered light intensities, setting a discrimination line indicating a boundary value of the second scattered light intensities based on the determination, and discriminating, using the discrimination line, defects on the object.
    Type: Grant
    Filed: January 9, 2008
    Date of Patent: March 16, 2010
    Assignee: Fujitsu Microelectronics Limited
    Inventors: Naohiro Takahashi, Kiyoshi Irino
  • Publication number: 20080165352
    Abstract: A method of inspecting defects on an object includes irradiating predetermined particles with a laser beam to measure first scattered light intensities, irradiating plural types of defects with the laser beam to measure second scattered light intensities, determining types of some defects selected out of the plural types of defects using the first scattered light intensities, setting a discrimination line indicating a boundary value of the second scattered light intensities based on the determination, and discriminating, using the discrimination line, defects on the object.
    Type: Application
    Filed: January 9, 2008
    Publication date: July 10, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Naohiro TAKAHASHI, Kiyoshi IRINO
  • Patent number: 7340352
    Abstract: An inspecting method is capable of efficiently inspecting a wafer. According to the inspecting method, the chip area of a wafer is inspected for defects, and based on the results, a defect density D0p of each of peripheral-zone chips in the chip area which are located closely to the peripheral area of the wafer is calculated. A peripheral-zone chip with a high defect density D0p is selected, and an area in the peripheral area which is outward of the selected peripheral-zone chip is inspected for defects. Since only the area in the peripheral area which is located outward of the peripheral-zone chip selected based on the defect density D0p is inspected for defects, the wafer is inspected efficiently.
    Type: Grant
    Filed: October 27, 2006
    Date of Patent: March 4, 2008
    Assignee: Fujitsu Limited
    Inventors: Naohiro Takahashi, Kiyoshi Irino
  • Publication number: 20070255513
    Abstract: An inspecting method is capable of efficiently inspecting a wafer. According to the inspecting method, the chip area of a wafer is inspected for defects, and based on the results, a defect density D0p of each of peripheral-zone chips in the chip area which are located closely to the peripheral area of the wafer is calculated. A peripheral-zone chip with a high defect density D0p is selected, and an area in the peripheral area which is outward of the selected peripheral-zone chip is inspected for defects. Since only the area in the peripheral area which is located outward of the peripheral-zone chip selected based on the defect density D0p is inspected for defects, the wafer is inspected efficiently.
    Type: Application
    Filed: October 27, 2006
    Publication date: November 1, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Naohiro Takahashi, Kiyoshi Irino
  • Patent number: 7005393
    Abstract: A method of fabricating a semiconductor device which includes introducing, after a step of patterning a gate electrode, nitrogen atoms into an oxide film covering a device region on a semiconductor substrate, by exposing said oxide film to an atmosphere containing-nitrogen, such that said nitrogen atoms do not reach a region underneath said gate electrode, covering, after said step of introducing nitrogen atoms, said oxide film including said gate electrode by a CVD oxide film continuously without taking out said semiconductor substrate out of a processing chamber and forming a sidewall oxide film on a sidewall surface of said gate electrode by etching back said CVD oxide film.
    Type: Grant
    Filed: June 14, 2002
    Date of Patent: February 28, 2006
    Assignee: Fujitsu Limited
    Inventor: Kiyoshi Irino
  • Patent number: 6998303
    Abstract: An insulating film made of zirconia or hafnia is formed on the surface of a semiconductor substrate. A partial surface area of the insulating film is covered with a mask pattern. By using the mask pattern as a mask, ions are implanted into a region of the insulating film not covered with the mask pattern to give damages to the insulating film. By using the mask pattern as a mask, a portion of the insulating film is etched.
    Type: Grant
    Filed: August 5, 2003
    Date of Patent: February 14, 2006
    Assignee: Fujitsu Limited
    Inventors: Yoshihiro Sugita, Yusuke Morisaki, Kiyoshi Irino, Shiqin Xiao, Takayuki Ohba
  • Patent number: 6984267
    Abstract: A manufacture method for a semiconductor device includes the steps of: (a) transporting a silicon wafer into a reaction chamber having first and second gas introducing inlet ports; (b) introducing an oxidizing atmosphere via the first gas introducing inlet port and raising the temperature of the silicon wafer to an oxidation temperature; (c) introducing a wet oxidizing atmosphere to form a thermal oxide film on the surface of the silicon wafer; (d) purging gas in the reaction chamber by using inert gas to lower a residual water concentration to about 1000 ppm or lower; and (e) introducing an NO or N2O containing atmosphere into the reaction chamber via the second gas introducing inlet port while the silicon wafer is maintained above 700° C. and above the oxidation temperature, to introduce nitrogen into the thermal oxide film and form an oxynitride film. A thin oxynitride film can be manufactured with good mass productivity.
    Type: Grant
    Filed: September 6, 2002
    Date of Patent: January 10, 2006
    Assignee: Fujitsu Limited
    Inventors: Kiyoshi Irino, Ken-ichi Hikazutani, Tatsuya Kawamura, Taro Sugizaki, Satoshi Ohkubo, Toshiro Nakanishi, Kanetake Takasaki
  • Patent number: 6979658
    Abstract: A semiconductor device includes a substrate, a gate oxide film formed on the substrate, a gate electrode provided on the gate oxide film, first and second diffusion regions formed in the substrate at both lateral sides of the gate electrode. The gate electrode includes a first region located immediately underneath the gate electrode and a second region adjacent to the first region, wherein the first and second regions contain N atoms with respective concentrations such that the second region contains N with a higher concentration as compared with the first region.
    Type: Grant
    Filed: October 27, 1999
    Date of Patent: December 27, 2005
    Assignee: Fujitsu Limited
    Inventor: Kiyoshi Irino
  • Patent number: 6894369
    Abstract: An ultra high-speed semiconductor device has a high-K dielectric gate insulator layer, wherein spread of impurities to a Si substrate from a gate electrode through the high-K dielectric gate insulator layer, and spread of oxygen and metallic elements from the high-K dielectric gate insulator layer to the Si substrate or the gate electrode are suppressed by arranging the high-K dielectric film sandwiched by nitrogen atomic layers on the Si substrate that is covered by an oxygen atomic layer.
    Type: Grant
    Filed: March 29, 2002
    Date of Patent: May 17, 2005
    Assignee: Fujitsu Limited
    Inventors: Kiyoshi Irino, Yusuke Morisaki, Yoshihiro Sugita, Yoshiaki Tanida, Yoshihisa Iba
  • Patent number: 6780699
    Abstract: A semiconductor device in which the insulation characteristics of an insulating film of multilayer structure including a lower-layer insulating film and a high-dielectric-constant film formed on the lower-layer insulating film are ensured, and a method for fabricating such a semiconductor device. A silicon oxide film or a silicon oxynitride film is formed on a semiconductor substrate as a lower-layer insulating film and part of the lower-layer insulating film is removed. Then a high-dielectric-constant film the dielectric constant of which is higher than that of the lower-layer insulating film is formed on the exposed semiconductor substrate and the lower-layer insulating film. If the lower-layer insulating film is a silicon oxide film, then a metallic compound not including chlorine is used for forming this high-dielectric-constant film. If the lower-layer insulating film is a silicon oxynitride film, then a metallic chloride can be used for forming this high-dielectric-constant film.
    Type: Grant
    Filed: February 6, 2003
    Date of Patent: August 24, 2004
    Assignee: Fujitsu Limited
    Inventors: Yasuyuki Tamura, Yusuke Morisaki, Yoshihiro Sugita, Kiyoshi Irino, Takayuki Aoyama, Chikako Yoshida, Yoshihiro Sugiyama, Hitoshi Tanaka, Kanetake Takasaki
  • Publication number: 20040038555
    Abstract: An insulating film made of zirconia or hafnia is formed on the surface of a semiconductor substrate. A partial surface area of the insulating film is covered with a mask pattern. By using the mask pattern as a mask, ions are implanted into a region of the insulating film not covered with the mask pattern to give damages to the insulating film. By using the mask pattern as a mask, a portion of the insulating film is etched.
    Type: Application
    Filed: August 5, 2003
    Publication date: February 26, 2004
    Applicant: Fujitsu Limited
    Inventors: Yoshihiro Sugita, Yusuke Morisaki, Kiyoshi Irino, Shiqin Xiao, Takayuki Ohba
  • Publication number: 20030168697
    Abstract: A semiconductor device in which the insulation characteristics of an insulating film of multilayer structure including a lower-layer insulating film and a high-dielectric-constant film formed on the lower-layer insulating film are ensured, and a method for fabricating such a semiconductor device. A silicon oxide film or a silicon oxynitride film is formed on a semiconductor substrate as a lower-layer insulating film and part of the lower-layer insulating film is removed. Then a high-dielectric-constant film the dielectric constant of which is higher than that of the lower-layer insulating film is formed on the exposed semiconductor substrate and the lower-layer insulating film. If the lower-layer insulating film is a silicon oxide film, then a metallic compound not including chlorine is used for forming this high-dielectric-constant film. If the lower-layer insulating film is a silicon oxynitride film, then a metallic chloride can be used for forming this high-dielectric-constant film.
    Type: Application
    Filed: February 6, 2003
    Publication date: September 11, 2003
    Applicant: FUJITSU LIMITED
    Inventors: Yasuyuki Tamura, Yusuke Morisaki, Yoshihiro Sugita, Kiyoshi Irino, Takayuki Aoyama, Chikako Yoshida, Yoshihiro Sugiyama, Hitoshi Tanaka, Kanetake Takasaki
  • Publication number: 20030022523
    Abstract: A manufacture method for a semiconductor device includes the steps of: (a) transporting a silicon wafer into a reaction chamber having first and second gas introducing inlet ports; (b) introducing an oxidizing atmosphere via the first gas introducing inlet port and raising the temperature of the silicon wafer to an oxidation temperature; (c) introducing a wet oxidizing atmosphere to form a thermal oxide film on the surface of the silicon wafer; (d) purging gas in the reaction chamber by using inert gas to lower a residual water concentration to about 1000 ppm or lower; and (e) introducing an NO or N2O containing atmosphere into the reaction chamber via the second gas introducing inlet port while the silicon wafer is maintained above 700° C. and above the oxidation temperature, to introduce nitrogen into the thermal oxide film and form an oxynitride film. A thin oxynitride film can be manufactured with good mass productivity.
    Type: Application
    Filed: September 6, 2002
    Publication date: January 30, 2003
    Applicant: FUJITSU LIMITED
    Inventors: Kiyoshi Irino, Ken-ichi Hikazutani, Tatsuya Kawamura, Taro Sugizaki, Satoshi Ohkubo, Toshiro Nakanishi, Kanetake Takasaki
  • Publication number: 20030003667
    Abstract: A method includes the steps of forming a gate insulating film on a monocrystalline silicon substrate, forming a conductive film on the gate insulating film, and processing at least the conductive film to form a gate electrode. The gate insulating film is made up from an aluminum oxide film about 1 nm thick deposited on the monocrystalline silicon substrate by CVD, a hafnium oxide film about 4 nm thick deposited on the aluminum oxide film by CVD, and another aluminum oxide film about 1 nm thick deposited on the hafnium oxide film by CVD under the same formation conditions as the former aluminum oxide film.
    Type: Application
    Filed: May 21, 2002
    Publication date: January 2, 2003
    Applicant: Fujitsu Limited
    Inventors: Yusuke Morisaki, Yoshihiro Sugita, Kiyoshi Irino
  • Patent number: 6468926
    Abstract: A manufacture method for a semiconductor device includes the steps of: (a) transporting a silicon wafer into a reaction chamber having first and second gas introducing inlet ports; (b) introducing an oxidizing atmosphere via the first gas introducing inlet port and raising the temperature of the silicon wafer to an oxidation temperature; (c) introducing a wet oxidizing atmosphere to form a thermal oxide film on the surface of the silicon wafer; (d) purging gas in the reaction chamber by using inert gas to lower a residual water concentration to about 1000 ppm or lower; and (e) introducing an NO or N2O containing atmosphere into the reaction chamber via the second gas introducing inlet port while the silicon wafer is maintained above 700° C. and above the oxidation temperature, to introduce nitrogen into the thermal oxide film and form an oxynitride film. A thin oxynitride film can be manufactured with good mass productivity.
    Type: Grant
    Filed: June 29, 1999
    Date of Patent: October 22, 2002
    Assignee: Fujitsu Limited
    Inventors: Kiyoshi Irino, Ken-ichi Hikazutani, Tatsuya Kawamura, Taro Sugizaki, Satoshi Ohkubo, Toshiro Nakanishi, Kanetake Takasaki
  • Publication number: 20020151099
    Abstract: A method of fabricating a semiconductor device which includes introducing, after a step of patterning a gate electrode, nitrogen atoms into an oxide film covering a device region on a semiconductor substrate, by exposing said oxide film to an atmosphere containing-nitrogen, such that said nitrogen atoms do not reach a region underneath said gate electrode, covering, after said step of introducing nitrogen atoms, said oxide film including said gate electrode by a CVD oxide film continuously without taking out said semiconductor substrate out of a processing chamber and forming a sidewall oxide film on a sidewall surface of said gate electrode by etching back said CVD oxide film
    Type: Application
    Filed: June 14, 2002
    Publication date: October 17, 2002
    Applicant: FUJITSU LIMITED
    Inventor: Kiyoshi Irino
  • Publication number: 20020146916
    Abstract: An ultra high-speed semiconductor device has a high-K dielectric gate insulator layer, wherein spread of impurities to a Si substrate from a gate electrode through the high-K dielectric gate insulator layer, and spread of oxygen and metallic elements from the high-K dielectric gate insulator layer to the Si substrate or the gate electrode are suppressed by arranging the high-K dielectric film sandwiched by nitrogen atomic layers on the Si substrate that is covered by an oxygen atomic layer.
    Type: Application
    Filed: March 29, 2002
    Publication date: October 10, 2002
    Inventors: Kiyoshi Irino, Yusuke Morisaki, Yoshihiro Sugita, Yoshiaki Tanida, Yoshihisa Iba
  • Publication number: 20020052087
    Abstract: A semiconductor device includes a substrate, a gate oxide film formed on the substrate, a gate electrode provided on the gate oxide film, first and second diffusion regions formed in the substrate at both lateral sides of the gate electrode. The gate electrode includes a first region located immediately underneath the gate electrode and a second region adjacent to the first region, wherein the first and second regions contain N atoms with respective concentrations such that the second region contains N with a higher concentration as compared with the first region.
    Type: Application
    Filed: October 27, 1999
    Publication date: May 2, 2002
    Inventor: KIYOSHI IRINO
  • Patent number: 5990517
    Abstract: A semiconductor device includes a substrate, a gate oxide film formed on the substrate, a gate electrode provided on the gate oxide film, first and second diffusion regions formed in the substrate at both lateral sides of the gate electrode. The gate electrode includes a first region located immediately underneath the gate electrode and a second region adjacent to the first region, wherein the first and second regions contain N atoms with respective concentrations such that the second region contains N with a higher concentration as compared with the first region.
    Type: Grant
    Filed: August 27, 1997
    Date of Patent: November 23, 1999
    Assignee: Fujitsu Limited
    Inventor: Kiyoshi Irino