Abstract: A method for manufacturing a semiconductor device includes: forming a metal layer on a semiconductor layer; forming a plated layer having a pattern corresponding to a pattern of a gate bus line which couples each gate finger of a plurality of FETs on the metal layer, the pattern corresponding to the pattern of the gate bus line having a deficient part; forming a mask layer which covers the metal layer exposed in the deficient part; and patterning the metal layer by using the plated layer and the mask layer as a mask.

Abstract: A high frequency circuit device includes: two transmission lines having ends which are opposed to each other and are spaced from each other; a capacitor that is mounted on the end of one of the two transmission lines and has a lower face electrode acting as a mount face and an upper face electrode positioned higher than the lower face electrode; a resistor element that is provided on a region between the ends of the two transmission lines and connects the ends of the two transmission lines; and a connection conductor electrically connecting the upper face electrode of the capacitor and the other of the two transmission lines.

Abstract: An input buffer circuit for converting a logic level of an input logic signal comprises an inversion circuit and a level shift circuit in which the inversion circuit comprises an input terminal to which the input signal is applied, a first voltage source for supplying a first predetermined voltage, a second voltage source for supplying a second predetermined voltage having a level lower than that of the first predetermined voltage, a first resistor circuit having a first end connected to the first voltage source, a first enhancement type field effect transistor having a drain connected to a second end of the first resistor circuit, a source connected to the second voltage source and a gate connected to the input terminal, a second resistor circuit having a first end connected to the first voltage source, and a second enhancement type field effect transistor having a drain connected to a second end of the second resistor circuit, a source connected to the drain of the first enhancement type field effect transi