Abstract: It makes it easier to reduce the line capacitance of vertical signal lines in a solid-state image sensor in which signals are output via the vertical signal lines. The solid-state image sensor is provided with a logic circuit, a pixel circuit, and a negative capacitance circuit. In the solid-state image sensor, the logic circuit processes an analog signal. Also, in the solid-state image sensor, the pixel circuit generates an analog signal by photoelectric conversion, and outputs the analog signal to the logic circuit via a predetermined signal line. In the solid-state image sensor, the negative capacitance circuit is connected to the predetermined signal line.

Abstract: It makes it easier to reduce the line capacitance of vertical signal lines in a solid-state image sensor in which signals are output via the vertical signal lines. The solid-state image sensor is provided with a logic circuit, a pixel circuit, and a negative capacitance circuit. In the solid-state image sensor, the logic circuit processes an analog signal. Also, in the solid-state image sensor, the pixel circuit generates an analog signal by photoelectric conversion, and outputs the analog signal to the logic circuit via a predetermined signal line. In the solid-state image sensor, the negative capacitance circuit is connected to the predetermined signal line.

Abstract: It makes it easier to reduce the line capacitance of vertical signal lines in a solid-state image sensor in which signals are output via the vertical signal lines. The solid-state image sensor is provided with a logic circuit, a pixel circuit, and a negative capacitance circuit. In the solid-state image sensor, the logic circuit processes an analog signal. Also, in the solid-state image sensor, the pixel circuit generates an analog signal by photoelectric conversion, and outputs the analog signal to the logic circuit via a predetermined signal line. In the solid-state image sensor, the negative capacitance circuit is connected to the predetermined signal line.

Abstract: It makes it easier to reduce the line capacitance of vertical signal lines in a solid-state image sensor in which signals are output via the vertical signal lines. The solid-state image sensor is provided with a logic circuit, a pixel circuit, and a negative capacitance circuit. In the solid-state image sensor, the logic circuit processes an analog signal. Also, in the solid-state image sensor, the pixel circuit generates an analog signal by photoelectric conversion, and outputs the analog signal to the logic circuit via a predetermined signal line. In the solid-state image sensor, the negative capacitance circuit is connected to the predetermined signal line.

Abstract: There is provided a power supply switching circuit including a first control signal output unit that outputs a signal exceeding a predetermined potential using a main power supply as a first control signal when a power supply voltage of the main power supply exceeds a predetermined reference voltage, a second control signal output unit that outputs the signal exceeding the predetermined potential using a standby power supply from a battery as a second control signal when a potential of the first control signal does not exceed the predetermined potential, and a power supply output unit that outputs the main power supply when the first control signal exceeds the predetermined potential and outputs the standby power supply when the second control signal exceeds the predetermined potential.

Abstract: There is provided a circuit including a capacitor, a current source configured to supply a current to the capacitor, a comparator configured to output a result of comparison between a voltage stored in the capacitor and a predetermined voltage, and a switch section configured to intermittently which is caused to flow to the capacitor by the current source.

Abstract: There is provided a voltage detector including a reference voltage generator that generates a constant reference voltage when a power supply voltage is higher than a predetermined threshold voltage, and a detector that, when the power supply voltage exceeds a voltage that is higher than the threshold voltage by a predetermined potential, detects whether the power supply voltage is higher than a defined voltage based on the reference voltage and outputs a detection result.

Abstract: There is provided a voltage detector including a reference voltage generator that generates a constant reference voltage when a power supply voltage is higher than a predetermined threshold voltage, and a detector that, when the power supply voltage exceeds a voltage that is higher than the threshold voltage by a predetermined potential, detects whether the power supply voltage is higher than a defined voltage based on the reference voltage and outputs a detection result.

Abstract: There is provided a circuit including a capacitor, a current source configured to supply a current to the capacitor, a comparator configured to output a result of comparison between a voltage stored in the capacitor and a predetermined voltage, and a switch section configured to intermittently which is caused to flow to the capacitor by the current source.

Abstract: There is provided a power supply switching circuit including a first control signal output unit that outputs a signal exceeding a predetermined potential using a main power supply as a first control signal when a power supply voltage of the main power supply exceeds a predetermined reference voltage, a second control signal output unit that outputs the signal exceeding the predetermined potential using a standby power supply from a battery as a second control signal when a potential of the first control signal does not exceed the predetermined potential, and a power supply output unit that outputs the main power supply when the first control signal exceeds the predetermined potential and outputs the standby power supply when the second control signal exceeds the predetermined potential

Abstract: A bandgap reference circuit includes: a first PMOSFET connected to a power supply node; a first resistor connected to a drain of the first PMOSFET; a first diode connected to the first resistor and a ground node; a second PMOSFET connected to the power supply node; a second diode connected to a drain of the second PMOSFET and the ground node; a second resistor connected between the first PMOSFET and ground node; a third resistor connected between the second PMOSFET and ground node; a third PMOSFET connected to the power supply node and an output node of a reference voltage; a fourth resistor connected between the third PMOSFET and ground node; and an operational amplifier having a non-inverting input terminal connected to the first PMOSFET and an inverting input terminal connected to the second PMOSFET, an output voltage being applied to each gate of the first to third PMOSFETs.

Abstract: An encode circuit includes a digital average unit that receives cyclic thermometer codes or standard thermometer codes, and that reduces a bubble error in the received thermometer codes by a majority vote rule, a logical boundary detection unit that detects a logical boundary in the thermometer codes output from the digital average unit, and an encoder unit that generates output codes based on output signals from the logical boundary detection unit.

Abstract: Disclosed herein is an analog-to-digital conversion circuit configured to convert an input analog signal into a digital signal, said analog-to-digital conversion circuit includes: a first amplifying unit; a second amplifying unit; a comparing unit; a first averaging unit; a second averaging unit; and a third averaging unit.

Abstract: An encode circuit includes a digital average unit that receives cyclic thermometer codes or standard thermometer codes, and that reduces a bubble error in the received thermometer codes by a majority vote rule, a logical boundary detection unit that detects a logical boundary in the thermometer codes output from the digital average unit, and an encoder unit that generates output codes based on output signals from the logical boundary detection unit.

Abstract: Disclosed herein is an analog-to-digital conversion circuit configured to convert an input analog signal into a digital signal, said analog-to-digital conversion circuit includes: a first amplifying unit; a second amplifying unit; a comparing unit; a first averaging unit; a second averaging unit; and a third averaging unit.