Patents by Inventor Kiyoshi Nomura

Kiyoshi Nomura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11918905
    Abstract: An information processing apparatus includes controlling movement of any of first objects arranged on a field, controlling movement of a second object fed to any of the first objects, and carrying out control such that a first object satisfying prescribed proximity relation with the second object among the first objects acquires the second object. The controlling movement of a second object includes ejecting the second object to the field from a prescribed position in a direction determined based on an accepted first user operation input and moving the second object over the field in accordance with an accepted second user operation input. The controlling movement of any of the first objects moves any of the first objects toward the second object ejected to the field and moves any of the first objects toward the second object that moves over the field.
    Type: Grant
    Filed: February 1, 2022
    Date of Patent: March 5, 2024
    Assignee: Nintendo Co., Ltd.
    Inventors: Kiyoshi Mizuki, Shigeru Miyamoto, Tatsuo Nomura
  • Publication number: 20200283297
    Abstract: A method for producing an oligosilane which includes a reaction step of producing an oligosilane by dehydrogenative coupling of hydrosilane. The reaction step is carried out in the presence of a catalyst containing at least one transition element selected from the group consisting of Periodic Table group 3 transition elements, group 4 transition elements, group 5 transition elements, group 6 transition elements, and group 7 transition elements. Also disclosed is a method for producing a catalyst for dehydrogenative coupling that produces an oligosilane by dehydrogenative coupling of hydrosilane.
    Type: Application
    Filed: February 14, 2017
    Publication date: September 10, 2020
    Applicant: SHOWA DENKO K.K.
    Inventors: Kiyoshi NOMURA, Hiroshi UCHIDA, Yoshimitsu ISHIHARA, Shigeru SHIMADA, Kazuhiko SATO, Masayasu IGARASHI
  • Publication number: 20200062602
    Abstract: A method for producing an oligosilane including a reaction step of introducing a fluid containing a hydrosilane into a continuous reactor provided with a catalyst layer inside to produce an oligosilane from the hydrosilane and discharging a fluid containing the oligosilane from the reactor. The reaction step satisfies all of the following conditions (i) to (iii): (i) a temperature of the hydrosilane-containing fluid at an inlet of the catalyst layer is higher than a temperature of the oligosilane-containing fluid at an outlet of the catalyst layer; (ii) the temperature of the hydrosilane-containing fluid at the inlet of the catalyst layer is from 200 to 400° C.; and (iii) the temperature of the oligosilane-containing fluid at the outlet of the catalyst layer is from 50 to 300° C.
    Type: Application
    Filed: September 19, 2017
    Publication date: February 27, 2020
    Applicant: SHOWA DENKO K.K.
    Inventors: Kiyoshi NOMURA, Hiroshi UCHIDA
  • Publication number: 20190276321
    Abstract: Provided is an oligosilane production method with which a target oligosilane can be selectively produced. A reaction-produced mixture fluid which contains an oligosilane obtained by the dehydrogenative coupling of a hydrosilane is supplied to a membrane separator under specific conditions and/or brought into contact with an adsorbent under specific conditions.
    Type: Application
    Filed: October 23, 2017
    Publication date: September 12, 2019
    Applicant: SHOWA DENKO K.K.
    Inventors: Kiyoshi NOMURA, Hiroshi UCHIDA
  • Publication number: 20190256361
    Abstract: An object of the present invention is to provide an oligosilane production method with which a target oligosilane can be selectively produced. Oligosilanes can be efficiently produced at an improved selectivity for a target oligosilane by using, as a raw material, not only monosilane but also an oligosilane with a smaller number of silicon atoms than the target oligosilane or conversely an oligosilane with a larger number of silicon atoms than the target oligosilane.
    Type: Application
    Filed: June 6, 2017
    Publication date: August 22, 2019
    Applicant: SHOWA DENKO K.K.
    Inventors: Kiyoshi NOMURA, Hiroshi UCHIDA, Yoshimitsu ISHIHARA, Yumiko NAKAJIMA, Shigeru SHIMADA, Kazuhiko SATO
  • Publication number: 20160126592
    Abstract: A nonaqueous electrolyte solution for a secondary battery, including an electrolyte, a solvent and an additive, and a nonaqueous electrolyte secondary battery including the nonaqueous electrolyte solution. The additive contains a compound represented by the following formula (I): wherein n represents an integer of 1 to 4, in the case of n=1, R1 represents a halogen atom or the like, in the case of n=2, R1 represents an alkaline earth metal atom or the like, in the case of n=3, R1 represents a trivalent transition metal atom or the like, in the case of n=4, R1 represents a tetravalent transition metal atom or the like, and R2 represents an alkylene group of 1 to 6 carbon atoms or an alkenylene group of 2 to 6 carbon atoms.
    Type: Application
    Filed: February 3, 2014
    Publication date: May 5, 2016
    Applicant: SHOWA DENKO K.K.
    Inventors: Shunsuke SAITO, Yusuke AOKI, Takeshi KAWAMOTO, Kiyoshi NOMURA, Shuichi NAIJO
  • Patent number: 8293955
    Abstract: The production process for 1,2,3,4-tetrachlorohexafluorobutane of the present invention is characterized in that 1,2,3,4-tetrachlorobutane is reacted with fluorine in the presence of a solvent containing hydrogen fluoride. The 1,2,3,4-tetrachlorobutane may be obtained by chlorination of 3,4-dichlorobutene-1. Further, the present invention provides as well a process of refining 1,2,3,4-tetrachlorohexafluorobutane obtained in the manner described above. According to the present invention, 1,2,3,4-tetrachlorohexafluorobutane which is useful, for example, as a synthetic raw material for hexafluoro-1,3-butadiene used as an etching gas for semiconductors can industrially efficiently be produced by using 1,2,3,4-tetrachlorobutane which is a by-product of chloroprene and which has so far been disposed.
    Type: Grant
    Filed: March 26, 2008
    Date of Patent: October 23, 2012
    Assignee: Showa Denko K.K.
    Inventors: Hiromoto Ohno, Toshio Ohi, Nobutoshi Sasaki, Kiyoshi Nomura
  • Publication number: 20100130798
    Abstract: The production process for 1,2,3,4-tetrachlorohexafluorobutane of the present invention is characterized in that 1,2,3,4-tetrachlorobutane is reacted with fluorine in the presence of a solvent containing hydrogen fluoride. The 1,2,3,4-tetrachlorobutane may be obtained by chlorination of 3,4-dichlorobutene-1. Further, the present invention provides as well a process of refining 1,2,3,4-tetrachlorohexafluorobutane obtained in the manner described above. According to the present invention, 1,2,3,4-tetrachlorohexafluorobutane which is useful, for example, as a synthetic raw material for hexafluoro-1,3-butadiene used as an etching gas for semiconductors can industrially efficiently be produced by using 1,2,3,4-tetrachlorobutane which is a by-product of chloroprene and which has so far been disposed.
    Type: Application
    Filed: March 26, 2008
    Publication date: May 27, 2010
    Applicant: SHOWA DENK K.K.
    Inventors: Hiromoto Ohno, Toshio Ohi, Nobutoshi Sasaki, Kiyoshi Nomura
  • Patent number: 6941485
    Abstract: A clock supply circuit capable of supplying clock signals having different frequencies to processing circuits, simplifying the circuit configuration, and realizing a reduction of the power consumption only by using a low frequency external oscillator, wherein a reference clock is multiplied by a multiplication circuit to generate a multiplied clock, the multiplied clock is divided by a predetermined division ratio to generate a clock signal having a desired constant frequency by a receiving clock generating circuit, furthermore, a DSP clock generating circuit generates a clock signal having a variable frequency according to a processing load of a DSP in accordance with a judgment result of a load judgment circuit, so it is possible to supply a clock signal maintained synchronization with received signal as well as a clock signal having a frequency variably controlled in accordance with the processing load.
    Type: Grant
    Filed: July 25, 2001
    Date of Patent: September 6, 2005
    Assignee: Sony Corporation
    Inventors: Kiyoshi Nomura, Tadashi Fukami, Masaru Goto, Takayoshi Koizumi
  • Patent number: 6731702
    Abstract: A null symbol position detecting method, apparatus, and receiver for quickly and accurately detecting a null symbol from a broadcast signal containing it in any broadcast signal receiving environment. A digital audio broadcast (DAB) signal is received and tuned in and this signal is I/Q-demodulated. The I and Q signal obtained by the I/Q demodulation are delayed by an I-component delay circuit and a Q-component delay circuit respectively by one valid symbol period to form a delay signal Id and a delay signal Qd respectively. Correlation is obtained between the delay signals Id and Qd and the signals I and Q which are not delayed. The peak of this correlation is determined by a peak decision circuit. The level pattern of the peak is detected by a level pattern decision circuit.
    Type: Grant
    Filed: April 28, 2000
    Date of Patent: May 4, 2004
    Assignee: Sony Corporation
    Inventor: Kiyoshi Nomura
  • Patent number: 6563896
    Abstract: A digital broadcast receiver for determining the actual transmission mode of a Digital Audio Broadcast (DAB) signal with a delay circuit for delaying a received DAB signal is provided. With a correlation circuit for correlating a delay output of the delay circuit with the received DAB signal a moving average circuit for calculating a moving average of a correlation output of the correlation circuit. A transmission mode is assumed to be one of a plurality of transmission modes. The delay time of the delay circuit is set at a time corresponding to a symbol time length of the assumed transmission mode. The number of times that the output of the moving average circuit exceeds a prescribed value is counted. Based on counting results, the actual transmission mode is identified based on the maximum number of times that the output of the moving average circuit exceeds the prescribed value.
    Type: Grant
    Filed: August 3, 1999
    Date of Patent: May 13, 2003
    Assignee: Sony Corporation
    Inventors: Kiyoshi Nomura, Shigeru Kaneko
  • Publication number: 20020023239
    Abstract: A clock supply circuit capable of supplying clock signals having different frequencies to processing circuits, simplifying the circuit configuration, and realizing a reduction of the power consumption only by using a low frequency external oscillator, wherein a reference clock is multiplied by a multiplication circuit to generate a multiplied clock, the multiplied clock is divided by a predetermined division ratio to generate a clock signal having a desired constant frequency by a receiving clock generating circuit, furthermore, a DSP clock generating circuit generates a clock signal having a variable frequency according to a processing load of a DSP in accordance with a judgment result of a load judgment circuit, so it is possible to supply a clock signal maintained synchronization with received signal as well as a clock signal having a frequency variably controlled in accordance with the processing load.
    Type: Application
    Filed: July 25, 2001
    Publication date: February 21, 2002
    Inventors: Kiyoshi Nomura, Tadashi Fukami, Masaru Goto, Takayoshi Koizumi
  • Patent number: 6275551
    Abstract: An apparatus for receiving digital information signals, including a signal receiving portion for receiving a digital information signal, and for transmitting digital data composed of a series of transmission frames each divided into a plurality of segmental periods called symbols and including a reference Symbol for synchronization, a reference Symbol data extracting portion for extracting data transmitted through a reference Symbol from each of transmission frames of digital data obtained from the received digital information signal, a frequency offset detecting portion for obtaining a first frequency offset detection output based on the received digital information signal a strength of, data transmitted through the, reference Symbol at every transmission frame and obtaining also a second frequency offset detection output based on with the received digital information signal and a strength of specific data included in data transmitted in each of the plurality of Symbols, and a frequency synchronizing control
    Type: Grant
    Filed: July 29, 1998
    Date of Patent: August 14, 2001
    Assignee: Sony Corporation
    Inventors: Kiyoshi Nomura, Tadashi Fukami, Tatsuya Tsuruoka, Jin Nakamura
  • Publication number: 20010009725
    Abstract: This invention is related to a heat-shielding method which comprises disposing a thin plate having an IR-reflecting function adjacent to one side of a coated plate and disposing said coated plate in a position such that the surface adjacent to said thin plate is on the side not exposed to infrared light.
    Type: Application
    Filed: December 1, 2000
    Publication date: July 26, 2001
    Inventors: Makoto Moriyama, Yasuo Sato, Goro Nagao, Takamitsu Sawamura, Hiroyuki Ushioda, Kiyoshi Nomura, Katsuo Miki
  • Patent number: 6108353
    Abstract: A demodulating apparatus according for demodulating a modulated signal obtained by modulating a plurality of carriers having different frequencies, includes a data demodulating circuit for demodulating data by frequency-analyzing a time waveform of the modulated signal which is formed of a data period of one modulation time and a guard interval succeeding the data period and which includes in the data period a period having correlation with the guard interval and provided at a position away from the modulated signal by the one modulation time, a correlation circuit for detecting correlation between the guard interval of the modulated signal and the period in the data period having correlation with the guard interval and provided at a position away from the modulated signal by the one modulation time, and a synchronization signal generating circuit including the correlation circuit and for generating a synchronization signal based on a detection output from the correlation circuit.
    Type: Grant
    Filed: January 15, 1998
    Date of Patent: August 22, 2000
    Assignee: Sony Corporation
    Inventors: Jin Nakamura, Tatsuya Tsuruoka, Kiyoshi Nomura
  • Patent number: 5608936
    Abstract: A pillow has a bag which is made of mesh or the like and fully filled with filling materials, each of which is made of a flexible resin, has a hollow configuration such as a hollow sphere or a hollow body and made of a flexible resin and has two or more openings on its surface.
    Type: Grant
    Filed: September 19, 1995
    Date of Patent: March 11, 1997
    Assignee: Yamaichi Co., Ltd.
    Inventor: Kiyoshi Nomura