Patents by Inventor Kiyoshi Ohnaka

Kiyoshi Ohnaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6597016
    Abstract: An Si1−yGey layer (where 0<y<1), an Si layer containing C, a gate insulating film and a gate electrode are formed in this order on a semiconductor substrate. An Si/SiGe heterounction junction is formed between the Si and Si1−yGey layers. Since C is contained in the Si layer, movement, diffusion and segregation of Ge atoms in the Si1−yGey layer can be suppressed. As a result, the Si/Si1−yGey interface can have its structural disorder eased and can be kept definite and planar. Thus, the mobility of carriers moving along the interface in the channel can be increased. That is to say, the thermal budget of the semiconductor device during annealing can be improved. Also, by grading the concentration profile of C, the diffusion of C into the gate insulating film can be suppressed and decline in reliability can be prevented.
    Type: Grant
    Filed: January 13, 2000
    Date of Patent: July 22, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Koichiro Yuki, Tohru Saitoh, Minoru Kubo, Kiyoshi Ohnaka, Akira Asai, Koji Katayama
  • Patent number: 6586774
    Abstract: The method for fabricating a nitride semiconductor of the present invention includes the steps of: (1) growing a first semiconductor layer made of a first group III nitride over a substrate by supplying a first group III source and a group V source containing nitrogen; and (2) growing a second semiconductor layer made of a second group III nitride on the first semiconductor layer by supplying a second group III source and a group V source containing nitrogen. At least one of the steps (1) and (2) includes the step of supplying a p-type dopant over the substrate, and an area near the interface between the first semiconductor layer and the second semiconductor layer is grown so that the density of the p-type dopant locally increases.
    Type: Grant
    Filed: December 19, 2001
    Date of Patent: July 1, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Akihiko Ishibashi, Ayumu Tsujimura, Yoshiaki Hasegawa, Nobuyuki Otsuka, Gaku Sugahara, Ryoko Miyanaga, Toshitaka Shimamoto, Kenji Harafuji, Yuzaburo Ban, Kiyoshi Ohnaka
  • Patent number: 6544869
    Abstract: A method for depositing a semiconductor film on a wafer by making a source gas supplied flow almost horizontally to the surface of the wafer. When a process condition, e.g., the flow velocity or pressure of the source gas, should be changed, the source gas has its velocity and/or pressure changed so that the source gas is supplied at a substantially constant flow rate.
    Type: Grant
    Filed: June 20, 2001
    Date of Patent: April 8, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kenji Harafuji, Akihiko Ishibashi, Yuzaburo Ban, Kiyoshi Ohnaka
  • Publication number: 20020195054
    Abstract: A method for depositing a semiconductor film on a wafer by making a source gas supplied flow almost horizontally to the surface of the wafer. When a process condition, e.g., the flow velocity or pressure of the source gas, should be changed, the source gas has its velocity and/or pressure changed so that the source gas is supplied at a substantially constant flow rate.
    Type: Application
    Filed: July 15, 2002
    Publication date: December 26, 2002
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Kenji Harafuji, Akihiko Ishibashi, Yuzaburo Ban, Kiyoshi Ohnaka
  • Publication number: 20020081763
    Abstract: The method for fabricating a nitride semiconductor of the present invention includes the steps of: (1) growing a first semiconductor layer made of a first group III nitride over a substrate by supplying a first group III source and a group V source containing nitrogen; and (2) growing a second semiconductor layer made of a second group III nitride on the first semiconductor layer by supplying a second group III source and a group V source containing nitrogen. At least one of the steps (1) and (2) includes the step of supplying a p-type dopant over the substrate, and an area near the interface between the first semiconductor layer and the second semiconductor layer is grown so that the density of the p-type dopant locally increases.
    Type: Application
    Filed: December 19, 2001
    Publication date: June 27, 2002
    Inventors: Akihiko Ishibashi, Ayumu Tsujimura, Yoshiaki Hasegawa, Nobuyuki Otsuka, Gaku Sugahara, Ryoko Miyanaga, Toshitaka Shimamoto, Kenji Harafuji, Yuzaburo Ban, Kiyoshi Ohnaka
  • Publication number: 20020079502
    Abstract: The method for fabricating a semiconductor includes the steps of: (1) growing a first semiconductor layer made of AlxGa1−xN (0≦x≦1) on a substrate at a temperature higher than room temperature; and (2) growing a second semiconductor layer made of AluGavInwN (0<u≦1, 0≦v≦1, 0≦w≦1, u+v+w=1) over the first semiconductor layer. In the step (1), the mole fraction x of Al of the first semiconductor layer is set so that the lattice constant of the first semiconductor layer at room temperature substantially matches with the lattice constant of the second semiconductor layer in the bulk state after thermal shrinkage or thermal expansion.
    Type: Application
    Filed: December 18, 2001
    Publication date: June 27, 2002
    Inventors: Akihiko Ishibashi, Ayumu Tsujimura, Yasutoshi Kawaguchi, Nobuyuki Otsuka, Kiyoshi Ohnaka
  • Publication number: 20020054616
    Abstract: The semiconductor laser of this invention includes an active layer formed in a c-axis direction, wherein the active layer is made of a hexagonal-system compound semiconductor, and anisotropic strain is generated in a c plane of the active layer.
    Type: Application
    Filed: November 6, 2001
    Publication date: May 9, 2002
    Inventors: Satoshi Kamiyama, Masakatsu Suzuki, Takeshi Uenoyama, Kiyoshi Ohnaka, Akira Takamori, Masaya Mannoh, Isao Kidoguchi, Hideto Adachi, Akihiko Ishibashi, Toshiya Fukuhisa, Yasuhito Kumabuchi
  • Publication number: 20020030195
    Abstract: A semiconductor light-emitting device has first and second semiconductor layers each of a first conductivity type, a third semiconductor layer of a second conductivity type provided between the first and second semiconductor layers, and an active layer provided between the second and third semiconductor layers to emit light with charge injected therein from the second and third semiconductor layers. A graded composition layer is provided between the active layer and the third semiconductor layer to have a varying composition which is nearly equal to the composition of the active layer at the interface with the active layer and to the composition of the third semiconductor layer at the interface with the third semiconductor layer.
    Type: Application
    Filed: July 2, 2001
    Publication date: March 14, 2002
    Inventors: Shigeo Yoshii, Kiyoshi Ohnaka
  • Patent number: 6326638
    Abstract: The semiconductor laser of this invention includes an active layer formed in a c-axis direction, wherein the active layer is made of a hexagonal-system compound semiconductor, and anisotropic strain is generated in a c plane of the active layer.
    Type: Grant
    Filed: May 15, 1998
    Date of Patent: December 4, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Satoshi Kamiyama, Masakatsu Suzuki, Takeshi Uenoyama, Kiyoshi Ohnaka, Akira Takamori, Masaya Mannoh, Isao Kidoguchi, Hideto Adachi, Akihiko Ishibashi, Toshiya Fukuhisa, Yasuhito Kumabuchi
  • Patent number: 6136626
    Abstract: A semiconductor light-emitting device with a double hetero structure, including: an active layer made of Ga.sub.1-x In.sub.x N (0.ltoreq.x.ltoreq.0.3) doped with a p-type impurity and an n-type impurity; and first and second cladding layers provided so as to sandwich the active layer.
    Type: Grant
    Filed: February 3, 1999
    Date of Patent: October 24, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Isao Kidoguchi, Hideto Adachi, Akihiko Ishibashi, Kiyoshi Ohnaka, Yuzaburo Ban, Minoru Kubo
  • Patent number: 6133058
    Abstract: A semiconductor light-emitting device with a double hetero structure, including: an active layer made of Ga.sub.1-x In.sub.x N (0.ltoreq.x.ltoreq.0.3) doped with a p-type impurity and an n-type impurity; and first and second cladding layers provided so as to sandwich the active layer.
    Type: Grant
    Filed: February 3, 1999
    Date of Patent: October 17, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Isao Kidoguchi, Hideto Adachi, Akihiko Ishibashi, Kiyoshi Ohnaka, Yuzaburo Ban, Minoru Kubo
  • Patent number: 6055253
    Abstract: A semiconductor laser device having an active layer, a pair of cladding layers interposing the active layer and a multi-quantum barrier provided between one of the pair of cladding layers and the active layer is provided, and the multi-quantum barrier includes barrier layers and well layers being alternated with each other. The semiconductor laser device also including an optical guide layer confining light generated in a quantum well layer, and the optical guide layer being undoped.
    Type: Grant
    Filed: March 1, 1995
    Date of Patent: April 25, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Isao Kidoguchi, Kiyoshi Ohnaka, Hideto Adachi, Satoshi Kamiyama, Masaya Mannou, Takeshi Uenoyama
  • Patent number: 5974068
    Abstract: A semiconductor laser according to the present invention includes: a semiconductor substrate; a multilayer structure provided on the semiconductor substrate, the multilayer structure including an active layer, a pair of cladding layers interposing the active layer, and current confining portion for injecting a current into a stripe-shaped predetermined region of the active layer, wherein the current confining portion includes a first current confining layer formed in regions excluding a region corresponding to the predetermined region of the active layer, the first current confining layer having an energy band gap larger than an energy band gap of the active layer and having a refractive index smaller than a refractive index of the active layer.
    Type: Grant
    Filed: March 21, 1997
    Date of Patent: October 26, 1999
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hideto Adachi, Isao Kidoguchi, Kiyoshi Ohnaka, Satoshi Kamiyama
  • Patent number: 5895225
    Abstract: A semiconductor light-emitting device with a double hetero structure, including: an active layer made of Ga.sub.1-x In.sub.x N (0.ltoreq.x.ltoreq.0.3) doped with a p-type impurity and an n-type impurity; and first and second cladding layers provided so as to sandwich the active layer.
    Type: Grant
    Filed: November 26, 1997
    Date of Patent: April 20, 1999
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Isao Kidoguchi, Hideto Adachi, Akihiko Ishibashi, Kiyoshi Ohnaka, Yuzaburo Ban, Minoru Kubo
  • Patent number: 5787104
    Abstract: The semiconductor laser of this invention includes an active layer formed in a c-axis direction, wherein the active layer is made of a hexagonal-system compound semiconductor, and anisotropic strain is generated in a c plane of the active layer.
    Type: Grant
    Filed: January 19, 1996
    Date of Patent: July 28, 1998
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Satoshi Kamiyama, Masakatsu Suzuki, Takeshi Uenoyama, Kiyoshi Ohnaka, Akira Takamori, Masaya Mannoh, Isao Kidoguchi, Hideto Adachi, Akihiko Ishibashi, Toshiya Fukuhisa, Yasuhito Kumabuchi
  • Patent number: 5751013
    Abstract: A semiconductor light-emitting device with a double hetero structure, including: an active layer made of Ga.sub.1-x In.sub.x N (0.ltoreq.x.ltoreq.0.3) doped with a p-type impurity and an n-type impurity; and first and second cladding layers provided so as to sandwich the active layer.
    Type: Grant
    Filed: March 21, 1996
    Date of Patent: May 12, 1998
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Isao Kidoguchi, Hideto Adachi, Akihiko Ishibashi, Kiyoshi Ohnaka, Yuzaburo Ban, Minoru Kubo
  • Patent number: 5600667
    Abstract: A semiconductor laser device having an active layer, a pair of cladding layers interposing the active layer and a multi-quantum barrier provided between one of the pair of cladding layers and the active layer is provided. The multi-quantum barrier includes barrier layers and well layers being alternated with each other. Thickness, energy band gap, or impurity concentration of at least one of the barrier layers and well layers in the multi-quantum barrier changes with the distance from the active layer, thereby providing a stable function of reflecting carriers overflowing from the active layer back to the active layer.
    Type: Grant
    Filed: April 5, 1994
    Date of Patent: February 4, 1997
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Isao Kidoguchi, Kiyoshi Ohnaka, Hideto Adachi, Satoshi Kamiyama, Masaya Mannou, Takeshi Uenoyama
  • Patent number: 5561080
    Abstract: A semiconductor laser of the invention includes a (100) GaAs substrate having at least one stripe groove formed on an upper face thereof, and a semiconductor multilayer structure formed on the substrate. The stripe groove extends along a <1-10> direction. The semiconductor multilayer structure includes an Al.sub.x Ga.sub.1-x As layer (0.ltoreq.x.ltoreq.1) including a portion having a surface of an (all) crystal plane (a>1), the portion being positioned on the stripe groove, a pair of AlGaInP cladding layers provided on the Al.sub.x Ga.sub.1-x As layer (0.ltoreq.x.ltoreq.1), and an active layer sandwiched between the pair of AlGaInP cladding layers.
    Type: Grant
    Filed: March 1, 1995
    Date of Patent: October 1, 1996
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Akihiko Ishibashi, Isao Kidoguchi, Kiyoshi Ohnaka, Masaya Mannou
  • Patent number: 5546418
    Abstract: A semiconductor laser of the invention includes a (100) GaAs substrate having at least one stripe groove formed on an upper face thereof, and a semiconductor multilayer structure formed on the substrate. The stripe groove extends along a <1-10> direction. The semiconductor multilayer structure includes an Al.sub.x Ga.sub.1-x As layer (0.ltoreq.x.ltoreq.1) including a portion having a surface of an (a11) crystal plane (a>1), the portion being positioned on the stripe groove, a pair of AlGaInP cladding layers provided on the Al.sub.x Ga.sub.1-x As layer (0.ltoreq.x.ltoreq.1), and an active layer sandwiched between the pair of AlGaInP cladding layers.
    Type: Grant
    Filed: July 27, 1994
    Date of Patent: August 13, 1996
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Akihiko Ishibashi, Isao Kidoguchi, Kiyoshi Ohnaka, Masaya Mannou
  • Patent number: 5523256
    Abstract: A semiconductor laser according to the present invention includes: a semiconductor substrate; a multilayer structure provided on the semiconductor substrate, the multilayer structure including an active layer, a pair of cladding layers interposing the active layer, and current confining portion for injecting a current into a stripe-shaped predetermined region of the active layer, wherein the current confining portion includes a first current confining layer formed in regions excluding a region corresponding to the predetermined region of the active layer, the first current confining layer having an energy band gap larger than an energy band gap of the active layer and having a refractive index smaller than a refractive index of the active layer.
    Type: Grant
    Filed: July 21, 1994
    Date of Patent: June 4, 1996
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hideto Adachi, Isao Kidoguchi, Kiyoshi Ohnaka, Satoshi Kamiyama