Patents by Inventor Kiyoshi OOUCHI

Kiyoshi OOUCHI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11031238
    Abstract: In a silicon carbide stacked substrate, the efficiency of converting the basal plane dislocation (BPD) which is a fault to deteriorate the current-carrying reliability into a threading edge dislocation (TED) which is a harmless fault is improved, thereby improving the reliability of the silicon carbide stacked substrate. As means therefor, in a silicon carbide stacked substrate including a SiC substrate and a buffer layer and a drift layer which are epitaxial layers sequentially formed on the SiC substrate, a semiconductor layer having an impurity concentration lower than those of the SiC substrate and the buffer layer and higher than that of the drift layer is formed between the SiC substrate and the buffer layer so as to be in contact with an upper surface of the SiC substrate.
    Type: Grant
    Filed: January 30, 2018
    Date of Patent: June 8, 2021
    Assignee: Hitachi Metals, Ltd.
    Inventors: Kumiko Konishi, Kiyoshi Oouchi, Keisuke Kobayashi, Akio Shima
  • Publication number: 20200006066
    Abstract: In a silicon carbide stacked substrate, the efficiency of converting the basal plane dislocation (BPD) which is a fault to deteriorate the current-carrying reliability into a threading edge dislocation (TED) which is a harmless fault is improved, thereby improving the reliability of the silicon carbide stacked substrate. As means therefor, in a silicon carbide stacked substrate including a SiC substrate and a buffer layer and a drift layer which are epitaxial layers sequentially formed on the SiC substrate, a semiconductor layer having an impurity concentration lower than those of the SiC substrate and the buffer layer and higher than that of the drift layer is formed between the SiC substrate and the buffer layer so as to be in contact with an upper surface of the SiC substrate.
    Type: Application
    Filed: January 30, 2018
    Publication date: January 2, 2020
    Inventors: Kumiko KONISHI, Kiyoshi OOUCHI, Keisuke KOBAYASHI, Akio SHIMA