Abstract: A calculation unit calculates a detection value of a capacitance of a capacitor based on a detection signal. A correction unit repeatedly performs a shift to a correction mode. When the correction mode is entered, the correction unit controls an AC voltage output unit so that a difference between amplitudes of first and second AC voltages changes, and obtains a correction value corresponding to a change in the detection value of the calculation unit caused by the change in the difference between the amplitudes. The correction unit corrects the detection value calculated by the calculation unit in accordance with the change in the correction values obtained in the correction mode.

Abstract: A first gate drive outputs a first drive voltage to turn a first transistor on upon occurrence of a condition in which a voltage at a supply terminal is higher than a voltage at a ground terminal, the output first drive voltage being higher than the voltage at the ground terminal. A second gate drive outputs a second drive voltage to turn a second transistor on, upon occurrence of a condition in which the voltage at the supply terminal is lower than the voltage at the ground terminal, the output second drive voltage being higher than the voltage at the supply terminal.

Abstract: A sensor device includes a sensor unit that generates a detection signal having the same detection frequency as an entered sinusoidal analog signal and matching a physical quantity to be detected; a reference signal generating unit that generates a reference signal having the detection frequency, according to the entered analog signal; converting units that convert the detection signal and reference signal to digital signals in synchronization with a clock signal; a demodulating unit that multiplies the digital detection signal by each of two sinusoidal synchronization signals having the detection frequency, the phases of the two synchronization signals being shifted from each other by one-fourth of a cycle, and generates two demodulated signals free from a harmonic component; and a correcting unit that corrects the demodulated signals according to the digital reference signal so as to suppress variations, in the demodulated signals, caused by variations in the clock signal phase.

Abstract: An electrostatic capacitance sensor includes: at least one detection electrode; drive electrodes, capacitors being respectively formed between the drive electrodes and the at least one detection electrode; a driver capable of causing voltages of the drive electrodes to change independently from each other; a reference voltage generator that generates a reference voltage; a detection signal generator that transfers charge so that a voltage of the at least one detection electrode approaches the reference voltage and that generates a detection signal according to the transfer of the charge; and a controller that controls the driver. The driver is capable of applying the reference voltage to each of the drive electrodes. When the driver causes a voltage of one or more of the drive electrodes to change, the controller controls the driver so as to apply the reference voltage to the remaining drive electrodes.

Abstract: An electrostatic capacitance sensor includes: at least one detection electrode; drive electrodes, capacitors being respectively formed between the drive electrodes and the at least one detection electrode; a driver capable of causing voltages of the drive electrodes to change independently from each other; a reference voltage generator that generates a reference voltage; a detection signal generator that transfers charge so that a voltage of the at least one detection electrode approaches the reference voltage and that generates a detection signal according to the transfer of the charge; and a controller that controls the driver. The driver is capable of applying the reference voltage to each of the drive electrodes. When the driver causes a voltage of one or more of the drive electrodes to change, the controller controls the driver so as to apply the reference voltage to the remaining drive electrodes.

Abstract: A sensor device includes: a sensor unit that generates a detection signal having the same detection frequency as an entered sinusoidal analog signal and matching a physical quantity to be detected; a reference signal generating unit that generates a reference signal having the detection frequency, according to the entered analog signal; converting units that convert the detection signal and reference signal to digital signals in synchronization with a clock signal; a demodulating unit that multiplies the digital detection signal by each of two sinusoidal synchronization signals having the detection frequency, the phases of the two synchronization signals being shifted from each other by one-fourth of a cycle, and generates two demodulated signals free from a harmonic component; and a correcting unit that corrects the demodulated signals according to the digital reference signal so as to suppress variations, in the demodulated signals, caused by variations in the clock signal phase.

Abstract: A capacitance detection device includes a first voltage output circuit configured to output a first alternating current voltage supplied to a shield electrode provided proximate to a detection electrode, a second voltage output circuit configured to output a second alternating current voltage whose frequency and phase are the same as that of the first alternating current voltage and whose amplitude is less than that of the first alternating current voltage, and a current output circuit configured to output a driving current Is to the detection electrode so that the difference between the voltage of the detection electrode and the second alternating current voltage becomes smaller, and output a detection signal corresponding to the driving current. The second voltage output circuit outputs a second alternating current voltage whose amplitude is adjusted so that the driving current in the absence of the object proximate to the detection electrode.

Abstract: In a sine-wave multiplier, signal components included in an output signal Qu1 and corresponding to the product of a third-order harmonic component of a first square wave W1 and an input signal Vi and the product of a fifth-order harmonic component of the first square wave W1 and the input signal Vi are offset by a signal component included in an output signal Qu2 and corresponding to the product of a fundamental component of a second square wave W2 and the input signal Vi and a signal component included in an output signal Qu3 and corresponding to the product of a fundamental component of a second square wave W3 and the input signal Vi.

Abstract: A capacitance detection device includes a first voltage output circuit configured to output a first alternating current voltage supplied to a shield electrode provided proximate to a detection electrode, a second voltage output circuit configured to output a second alternating current voltage whose frequency and phase are the same as that of the first alternating current voltage and whose amplitude is less than that of the first alternating current voltage, and a current output circuit configured to output a driving current Is to the detection electrode so that the difference between the voltage of the detection electrode and the second alternating current voltage becomes smaller, and output a detection signal corresponding to the driving current. The second voltage output circuit outputs a second alternating current voltage whose amplitude is adjusted so that the driving current in the absence of the object proximate to the detection electrode.

Abstract: Provided is a sine wave multiplication device of simple configuration, broad input signal level range, and minimal fluctuation in characteristics due to temperature. A signal component that corresponds to a product of an input signal Si and the third harmonic wave of a first square wave W1 included in an output signal Su1; and a signal component that corresponds to a product of the input signal Si and the fifth harmonic wave of the first square wave W1 is canceled by: a signal component that corresponds to a product of the input signal Si and the fundamental wave of a second square wave W2 included in an output signal Su2; and a signal component that corresponds to a product of the input signal Si and the fundamental wave of a second square wave W3 included in an output signal Su3.

Abstract: In a sine-wave multiplier, signal components included in an output signal Qu1 and corresponding to the product of a third-order harmonic component of a first square wave W1 and an input signal Vi and the product of a fifth-order harmonic component of the first square wave W1 and the input signal Vi are offset by a signal component included in an output signal Qu2 and corresponding to the product of a fundamental component of a second square wave W2 and the input signal Vi and a signal component included in an output signal Qu3 and corresponding to the product of a fundamental component of a second square wave W3 and the input signal Vi.

Abstract: Provided is a sine wave multiplication device of simple configuration, broad input signal level range, and minimal fluctuation in characteristics due to temperature. A signal component that corresponds to a product of an input signal Si and the third harmonic wave of a first square wave W1 included in an output signal Su1; and a signal component that corresponds to a product of the input signal Si and the fifth harmonic wave of the first square wave W1 is canceled by: a signal component that corresponds to a product of the input signal Si and the fundamental wave of a second square wave W2 included in an output signal Su2; and a signal component that corresponds to a product of the input signal Si and the fundamental wave of a second square wave W3 included in an output signal Su3.

Abstract: A differential signal is input to a pair of gates of a differential pair, a differential signal generated by a load circuit connected to drains of the differential pair is amplified by a differential amplifier stage, and the amplified differential signal is fed back to a pair of sources of the differential pair via a feedback circuit. It is possible to maintain a high input impedance in the pair of gates of the differential pair while not being influenced by a gain of negative feedback of an amplifier circuit, and it is possible to perform amplification in an input stage by using a pair of a first transistor and a second transistor of the differential pair. Therefore, compared with the related art, it is possible to decrease the number of transistors in the input stage and to reduce a flicker noise.

Abstract: In an integration mode, since a switch becomes OFF, a positive feedback path from an output terminal of an operational amplifier to a positive input terminal is blocked. Therefore, oscillation can be prevented even when a voltage of a signal line connected to a reference voltage supply point varies due to an impedance of the reference voltage supply point not being 0. In the integration mode, a resistor and a capacitor function as a noise filter. Further, in a reset mode, a switch becomes ON, and charge is accumulated in the capacitor depending on a reference voltage of the reference voltage supply point.

Abstract: A first transistor and a second transistor form a current mirror circuit. A second current flowing in the second transistor is kept constant by a current control circuit. Therefore, a first current, to be output to a load, in the first transistor is kept at a constant value responsive to the second current in the second transistor. Since a drain voltage in the second transistor is controlled so as to become equal to a drain voltage in the first transistor, even if a voltage at an output terminal changes in response to a change in the impedance of the load, a ratio between the first current and the second current becomes substantially equal to a size ratio K between the first transistor and the second transistor. That is, the first current and second current precisely operate as a current mirror circuit.

Abstract: A differential signal is input to a pair of gates of a differential pair, a differential signal generated by a load circuit connected to drains of the differential pair is amplified by a differential amplifier stage, and the amplified differential signal is fed back to a pair of sources of the differential pair via a feedback circuit. It is possible to maintain a high input impedance in the pair of gates of the differential pair while not being influenced by a gain of negative feedback of an amplifier circuit, and it is possible to perform amplification in an input stage by using a pair of a first transistor and a second transistor of the differential pair. Therefore, compared with the related art, it is possible to decrease the number of transistors in the input stage and to reduce a flicker noise.

Abstract: In an integration mode, since a switch becomes OFF, a positive feedback path from an output terminal of an operational amplifier to a positive input terminal is blocked. Therefore, oscillation can be prevented even when a voltage of a signal line connected to a reference voltage supply point varies due to an impedance of the reference voltage supply point not being 0. In the integration mode, a resistor and a capacitor function as a noise filter. Further, in a reset mode, a switch becomes ON, and charge is accumulated in the capacitor depending on a reference voltage of the reference voltage supply point.

Abstract: A charge pump capable of responding to a high frequency contains a first constant current source 1 connected between a power supply Vcc and an output terminal Out; and first and second NPN transistors 2 and 3 between the output terminal Out and a ground with their collectors connected to the output terminal Out. A first signal output from a phase comparator is input to a base of the first NPN transistor 2, and a second signal output from the phase comparator is input to a base of the second NPN transistor 3.

Abstract: An active loop filter has a pre-amplifier for receiving an error signal, a current mirror circuit for supplying a bias current to the pre-amplifier, and an inverting amplifier driven by the pre-amplifier. The pre-amplifier has a first transistor of which the collector is connected to a power supply source and a second transistor of which the collector is connected to the emitter of the first transistor and in which the collector current flows in common with the first transistor, the emitter of the second transistor is connected with the inverting amplifier, the reference current of the current mirror circuit is supplied to the base of the first transistor, the output current of the current mirror circuit is supplied to the base of the second transistors, and the error signal is input to the base of the first transistor.

Abstract: A thin film device comprising a substrate which is magnetic and has insulation property at least on the surface, coils formed spirally in a planar configuration on the substrate, a first interlayer insulation film formed to a portion excepting for the terminal portion of the coils and a magnetic material connection portion of the substrate, a magnetic film and a second interlayer insulation film formed successively on the first interlayer insulation film excepting for the terminal portions, and bump electrodes formed in connection with the terminal portions in which a crystallite material having a composition: Fe.sub.78 Ta.sub.10 C.sub.12 is used as the magnetic film. The thin film device can be formed an a reduced size and having a large inductance value. When the device is used as a noise filter, a cut-off frequency range can be lowered.