Abstract: An electro-optical device includes a pixel circuit 41G, a pixel circuit 41B, a high potential line 47G configured to supply a high potential VDDG to the pixel circuit 41G, a high potential line 47B configured to supply a high potential VDDB to the pixel circuit 41B, and a low potential line 46 configured to supply a first low potential VSS1 to the pixel circuit 41G and the pixel circuit 41B. The pixel circuit 41G includes a light-emitting element 20G configured to display G, the pixel circuit 41B includes a light-emitting element 20B configured to display B, and the high potential VDDG and the high potential VDDB are mutually independent.

Abstract: An electro-optical device includes a pixel circuit 41G, a pixel circuit 41B, a high potential line 47G configured to supply a high potential VDDG to the pixel circuit 41G, a high potential line 47B configured to supply a high potential VDDB to the pixel circuit 41B, and a low potential line 46 configured to supply a first low potential VSS1 to the pixel circuit 41G and the pixel circuit 41B. The pixel circuit 41G includes a light-emitting element 20G configured to display G, the pixel circuit 41B includes a light-emitting element 20B configured to display B, and the high potential VDDG and the high potential VDDB are mutually independent.

Abstract: An electro-optical device includes a pixel circuit 41G, a pixel circuit 41B, a high potential line 47G configured to supply a high potential VDDG to the pixel circuit 41G, a high potential line 47B configured to supply a high potential VDDB to the pixel circuit 41B, and a low potential line 46 configured to supply a first low potential VSS1 to the pixel circuit 41G and the pixel circuit 41B. The pixel circuit 41G includes a light-emitting element 20G configured to display G, the pixel circuit 41B includes a light-emitting element 20B configured to display B, and the high potential VDDG and the high potential VDDB are mutually independent.

Abstract: Provided are a scan line, a data line, a pixel circuit provided corresponding to an intersection between the scan line and the data line, and an enable line. The pixel circuit includes a memory circuit, a light-emitting element, and an enable line driving circuit, the light-emitting element changes luminance in accordance with an image signal retained in the memory circuit, the enable line driving circuit controls a light emission enabled state of the light-emitting element, the pixel circuit includes a first pixel circuit, a second pixel circuit, a third pixel circuit, and a fourth pixel circuit, the enable line includes a first enable line and a second enable line, the first pixel circuit and the second pixel circuit are electrically connected with the first enable line, and the third pixel circuit and the fourth pixel circuit are electrically connected with the second enable line.

Abstract: An electro-optical device includes a pixel circuit 41G, a pixel circuit 41B, a high potential line 47G configured to supply a high potential VDDG to the pixel circuit 41G, a high potential line 47B configured to supply a high potential VDDB to the pixel circuit 41B, and a low potential line 46 configured to supply a first low potential VSS1 to the pixel circuit 41G and the pixel circuit 41B. The pixel circuit 41G includes a light-emitting element 20G configured to display G, the pixel circuit 41B includes a light-emitting element 20B configured to display B, and the high potential VDDG and the high potential VDDB are mutually independent.

Abstract: An electro-optical device includes a scan line, a data line, a pixel circuit, and an enable line. The pixel circuit includes a memory circuit, a light emitting element, and a first transistor. The light emitting element changes brightness in response to an image signal held in the memory circuit. The first transistor controls light emission and non-light-emission of the light emitting element. A field for displaying a single image each includes a sub-field (SF1) and a sub-field (SF2). The sub-field (SF1) and the sub-field (SF2) include a non-display period during which the light emitting element does not emit light and a display period during which the light emitting element is allowed to emit light. A length of the display period in the sub-field (SF1) is different from a length of the display period in the sub-field (SF2).

Abstract: An electro-optical device includes a first scan line, a second scan line, a data line, a pixel circuit located at a position corresponding to an intersection of the data line and each of the first scan line and the second scan line, and a scan line drive circuit supplying one of a selection signal and a non-selection signal to the first scan line and supplying one of a maintain signal and a non-maintain signal to the second scan line. The scan line drive circuit is capable of output the selection signal and the non-maintain signal during an identical period.

Abstract: An electro-optical device includes a pixel circuit provided to correspond to an intersection of a scan line and a data line, a low potential line, and a high potential line. The pixel circuit includes a light emitting element, a first transistor, and a memory circuit including a first inverter, a second inverter, and a second transistor. The first transistor is disposed between an first input terminal of the first inverter and the data line. The second transistor is disposed between an second output terminal of the second inverter and the first input terminal. An first output terminal of the first inverter is electrically connected to an second input terminal of the second inverter. When the first transistor is in an ON-state, the second transistor is in an OFF-state.

Abstract: An electro-optical device a pixel circuit located at a position corresponding to an intersection of a scan line and a data line, a first potential line supplies a first potential, a second potential line supplies a second potential, and a third potential line supplies a third potential. The pixel circuit includes a light emitting element and a memory circuit. The memory circuit that is disposed between the first potential line and the second potential line, and that includes a first transistor. A source of the first transistor is electrically connected to the first potential line. The light emitting element is disposed between a drain of the first transistor and the third potential line. An absolute value of a potential between the first potential and the second potential is smaller than an absolute value of a potential between the third potential and the second potential.

Abstract: Provided are a scan line, a data line, a pixel circuit provided corresponding to an intersection between the scan line and the data line, and an enable line. The pixel circuit includes a memory circuit, a light-emitting element, and an enable line driving circuit, the light-emitting element changes luminance in accordance with an image signal retained in the memory circuit, the enable line driving circuit controls a light emission enabled state of the light-emitting element, the pixel circuit includes a first pixel circuit, a second pixel circuit, a third pixel circuit, and a fourth pixel circuit, the enable line includes a first enable line and a second enable line, the first pixel circuit and the second pixel circuit are electrically connected with the first enable line, and the third pixel circuit and the fourth pixel circuit are electrically connected with the second enable line.

Abstract: An electro-optical device includes a first scan line, a data line, and a pixel circuit provided at a position corresponding to intersections of the first scan line and the data line. The pixel circuit includes a light emitting element, a memory circuit, a first transistor, and a second transistor. The first transistor is electrically connected in series to the light emitting element, and a gate of the first transistor is electrically connected to the memory circuit. The second transistor is disposed between the data line and an input of a first inverter. The third transistor is disposed between an output terminal of a second inverter and the input of the first inverter. When the second transistor turns from an OFF-state to an ON-state, the third transistor is not in an ON-state.

Abstract: An electro-optical device includes a pixel circuit located at a position corresponding to an intersection of a scan line and a data line, a low potential line, and a high potential line. The pixel circuit includes a light emitting element, a first transistor, a memory circuit including a first inverter, a second inverter, and a second transistor, and a third transistor. The first transistor is disposed between an input of the first inverter and the data line. The second transistor is disposed between an output of the second inverter and the input. The third transistor and the light emitting element are disposed between the low potential line and the memory circuit. When the first transistor is in an ON-state, the second transistor and the third transistor are in an OFF-state.

Abstract: An electro-optical device includes a pixel circuit 41G, a pixel circuit 41B, a high potential line 47G configured to supply a high potential VDDG to the pixel circuit 41G, a high potential line 47B configured to supply a high potential VDDB to the pixel circuit 41B, and a low potential line 46 configured to supply a first low potential VSS1 to the pixel circuit 41G and the pixel circuit 41B. The pixel circuit 41G includes a light-emitting element 20G configured to display G, the pixel circuit 41B includes a light-emitting element 20B configured to display B, and the high potential VDDG and the high potential VDDB are mutually independent.

Abstract: An electro-optical device includes a first scan line, a second scan line, a data line, a pixel circuit located at a position corresponding to an intersection of the data line and each of the first scan line and the second scan line, and a scan line drive circuit supplying one of a selection signal and a non-selection signal to the first scan line and supplying one of a maintain signal and a non-maintain signal to the second scan line. The scan line drive circuit is capable of output the selection signal and the non-maintain signal during an identical period.

Abstract: An electro-optical device includes a scan line, a data line, a pixel circuit, and an enable line. The pixel circuit includes a memory circuit, a light emitting element, and a first transistor. The light emitting element changes brightness in response to an image signal held in the memory circuit. The first transistor controls light emission and non-light-emission of the light emitting element. A field for displaying a single image each includes a sub-field (SF1) and a sub-field (SF2). The sub-field (SF1) and the sub-field (SF2) include a non-display period during which the light emitting element does not emit light and a display period during which the light emitting element is allowed to emit light. A length of the display period in the sub-field (SF1) is different from a length of the display period in the sub-field (SF2).

Abstract: An electro-optical device includes a first scan line, a data line, and a pixel circuit provided at a position corresponding to intersections of the first scan line and the data line. The pixel circuit includes a light emitting element, a memory circuit, a first transistor, and a second transistor. The first transistor is electrically connected in series to the light emitting element, and a gate of the first transistor is electrically connected to the memory circuit. The second transistor is disposed between the data line and an input of a first inverter. The third transistor is disposed between an output terminal of a second inverter and the input of the first inverter. When the second transistor turns from an OFF-state to an ON-state, the third transistor is not in an ON-state.

Abstract: An electro-optical device a pixel circuit located at a position corresponding to an intersection of a scan line and a data line, a first potential line supplies a first potential, a second potential line supplies a second potential, and a third potential line supplies a third potential. The pixel circuit includes a light emitting element and a memory circuit. The memory circuit that is disposed between the first potential line and the second potential line, and that includes a first transistor. A source of the first transistor is electrically connected to the first potential line. The light emitting element is disposed between a drain of the first transistor and the third potential line. An absolute value of a potential between the first potential and the second potential is smaller than an absolute value of a potential between the third potential and the second potential.

Abstract: An electro-optical device includes a pixel circuit located at a position corresponding to an intersection of a scan line and a data line, a low potential line, and a high potential line. The pixel circuit includes a light emitting element, a first transistor, a memory circuit including a first inverter, a second inverter, and a second transistor, and a third transistor. The first transistor is disposed between an input of the first inverter and the data line. The second transistor is disposed between an output of the second inverter and the input. The third transistor and the light emitting element are disposed between the low potential line and the memory circuit. When the first transistor is in an ON-state, the second transistor and the third transistor are in an OFF-state.

Abstract: An electro-optical device includes a pixel circuit provided to correspond to an intersection of a scan line and a data line, a low potential line, and a high potential line. The pixel circuit includes a light emitting element, a first transistor, and a memory circuit including a first inverter, a second inverter, and a second transistor. The first transistor is disposed between an first input terminal of the first inverter and the data line. The second transistor is disposed between an second output terminal of the second inverter and the first input terminal. An first output terminal of the first inverter is electrically connected to an second input terminal of the second inverter. When the first transistor is in an ON-state, the second transistor is in an OFF-state.