Abstract: A method and apparatus for recording/reproducing video signals on or from storage media. A video signal is divided into k video blocks in a time-axis direction, wherein k is an integer not less than 2, finding a block skip interval s which is an integer satisfying an equation s=(pk+1)/n when p is an integer not less than 1 and n is an integer not less than 2. The k video blocks are interleaved in order ofi= s(j-1)}mod k+wherein i is an integer satisfying a relation 1.ltoreq.i.ltoreq.k and representing a block number of the video signal, and j is an integer satisfying a relation 1.ltoreq.j.ltoreq.k and representing an allocation block number on a storage medium (FIGS. 2(A) and 2(B)). And, thus interleaved video blocks are allocated on the storage medium (312).

Abstract: An HDTV signal transmission system for sending a 10-bit-parallel YPbPr-format HDTV signal converted to ten C4 containers, and further to the SDH (a new synchronous digital network) STM-16 frame for transmission based on CCITT recommendations. The system includes a transmitter and receiver. The transmitter has time dividers for time-based dividing the HDTV signal into eight separated video signals, a C4 container device for multiplexing the eight separated video signals to ten C4 containers, and a STM-16 framing device for reformatting the ten C4 containers to the STM-16 frame. The receiver has an STM-16 deframing device for separating the ten C4 containers from the STM-16 frame, a C4 de-container device for demultiplexing the ten C4 containers to eight separated video signals, and time-division multiplexers for time-division multiplexing the separated video signals to the 10-bit-parallel YPbPr-format HDTV signal.

Abstract: A frame synchronizing apparatus is disclosed which includes a serial-parallel converter for converting input serial data into parallel data of a plurality of channels; a plurality of intra-channel synchronization detecting circuits each for detecting a synchronization pattern and a pseudo-synchronization pattern in one channel, and generating a channel synchronization detect signal and a pseudo-synchronization detect signal in one channel; a plurality of bit-shift error pattern detecting circuits each for detecting a bit-shift error pattern in one channel, and generating a bit-shift error pattern signal in one channel; a synchronization/bit-shift error detecting circuit for detecting a synchronization between channels and specifying the amount of erroneously shifted bits, and generating a frame synchronization detect signal and bit-shift error detect signals; and a bit-shift signal generating circuit for calculating the number of erroneously shifted bits in the serial-parallel converter based on the bit-shift

Abstract: A multiplex signal processing apparatus in a singal transmitting and receiving system includes at the transmitting side: a first amplitude-modulator for modulating a first carrier by a main signal to obtain a vestigial sideband, amplitude-modulated main signal; a second amplitude-modulator for modulating a second carrier which has the same frequency but differs in phase by 90.degree. from the first carrier by a multiplex signal to obtain a double sideband, amplitude-modulated multiplex signal; an inverse Nyquist filter for filtering this signal to obtain a vestigial sideband, amplitude-modulated multiplex signal; and an adder for adding the vestigial sideband, amplitude-modulated main and multiplex signals to obtain a multiplexed signal.

Abstract: A multiplex signal processing apparatus in a signal transmitting and receiving system includes at the transmitting side: a first amplitude-modulator for modulating a first carrier by a main signal to obtain a vestigial sideband, amplitude-modulated main signal; a second amplitude-modulator for modulating a second carrier which has the same frequency but differs in phase by 90.degree. from the first carrier by a multiplex signal to obtain a double sideband, amplitude-modulated multiplex signal; an inverse Nyquist filter for filtering this signal to obtain a vestigial sideband, amplitude-modulated multiplex signal; and an adder for adding the vestigial sideband, amplitude-modulated main and multiplex signals to obtain a multiplexed signal.

Abstract: A multiple display control apparatus for a television receiver used for displaying a plurality of signals on a display tube. In a case of switching a first signal output and a second signal output of a signal process circuit are switched by switching circuits, when the two output signals are about equal in the brightness level to each other, the picture is very indistinct. Thus, the first signal level is lowered by means of gain control circuits, the characteristic thereof depending on an output impedance of the signal process circuit and resistances. The control signals for switching and gain control are superposed each other as one signal, so that only one line is used for control signal.