Patents by Inventor Kiyoshi Yanagisawa
Kiyoshi Yanagisawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 9344149Abstract: A power line carrier transmission apparatus for transmitting a transmission symbol via a power line, the power line carrier transmission apparatus including an interleave unit interleaving the transmission symbol, a modulation unit for modulating the transmission symbol interleaved by the interleave unit, and a transmission unit repeatedly transmitting the transmission symbol modulated by the modulation unit M times (where M is an integer larger than 1), wherein M symbols (where M denotes the number of the symbols), which are generated by repeatedly transmitting the transmission symbol M times by the transmission unit, are transmitted without guard intervals being added therebetween.Type: GrantFiled: June 19, 2015Date of Patent: May 17, 2016Assignee: Renesas Electronics CorporationInventors: Osamu Inagawa, Kiyoshi Yanagisawa, Toshiya Aramaki
-
Patent number: 9246720Abstract: A semiconductor device contains a narrow band noise detector section to detect narrow band noise in an input signal that is input by way of a power line. The semiconductor device further includes a reference signal generator section to generate a second reference signal whose amplitude value which corresponds to the narrow band noise frequency of a pre-established first reference signal is reduced, and a correlation calculation section to calculate the correlation value between the input signal and the second reference signal utilized in the frame synchronization processing of the input signal.Type: GrantFiled: December 11, 2014Date of Patent: January 26, 2016Assignee: Renesas Electronics CorporationInventors: Kiyoshi Yanagisawa, Osamu Inagawa, Toshiya Aramaki
-
Publication number: 20150288420Abstract: A power line carrier transmission apparatus for transmitting a transmission symbol via a power line, the power line carrier transmission apparatus including an interleave unit interleaving the transmission symbol, a modulation unit for modulating the transmission symbol interleaved by the interleave unit, and a transmission unit repeatedly transmitting the transmission symbol modulated by the modulation unit M times (where M is an integer larger than 1), wherein M symbols (where M denotes the number of the symbols), which are generated by repeatedly transmitting the transmission symbol M times by the transmission unit, are transmitted without guard intervals being added therebetween.Type: ApplicationFiled: June 19, 2015Publication date: October 8, 2015Inventors: Osamu INAGAWA, Kiyoshi Yanagisawa, Toshiya Aramaki
-
Patent number: 9065543Abstract: A power line carrier transmission apparatus according to an aspect of the present invention is a power line carrier transmission apparatus that transmits a transmission symbol via a transmission path. The transmission apparatus includes a frequency/time interleave unit that interleaves the transmission symbol, an OFDM modulation unit that OFDM-modulates the interleaved transmission symbol, a time-domain repeated transmission unit that repeatedly transmits the transmission symbol, which is modulated by the OFDM modulation unit, M times (M is an integer larger than 1) in a time domain.Type: GrantFiled: April 11, 2013Date of Patent: June 23, 2015Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Osamu Inagawa, Kiyoshi Yanagisawa, Toshiya Aramaki
-
Patent number: 9042471Abstract: A receiving device according to the present invention includes: a receiver for receiving an OFDM symbol that is modulated by phase shift keying; an FFT processor for applying an FFT process to the received OFDM symbol to obtain a subcarrier signal; a demapping unit for demapping the subcarrier signal to generate a bit string; a norm calculator for calculating the norm of the subcarrier; a weighting factor generator for generating a weighting factor by taking the statistics of the calculated norm; and a weighting unit for obtaining a soft decision value by weighting the bit string after demapping, based on the particular weighting factor. Thus, the receiving device can obtain a soft decision value to achieve good decoding performance with a small number of known signals and processes.Type: GrantFiled: July 22, 2014Date of Patent: May 26, 2015Assignee: Renesas Electronics CorporationInventors: Kiyoshi Yanagisawa, Osamu Inagawa
-
Publication number: 20150103931Abstract: A semiconductor device contains a narrow band noise detector section to detect narrow band noise in an input signal that is input by way of a power line. The semiconductor device further includes a reference signal generator section to generate a second reference signal whose amplitude value which corresponds to the narrow band noise frequency of a pre-established first reference signal is reduced, and a correlation calculation section to calculate the correlation value between the input signal and the second reference signal utilized in the frame synchronization processing of the input signal.Type: ApplicationFiled: December 11, 2014Publication date: April 16, 2015Applicant: Renesas Electronics CorporationInventors: Kiyoshi YANAGISAWA, Osamu INAGAWA, Toshiya ARAMAKI
-
Patent number: 8938039Abstract: A semiconductor device contains a narrow band noise detector section to detect narrow band noise in an input signal that is input by way of a power line. The semiconductor device further includes a reference signal generator section to generate a second reference signal whose amplitude value which corresponds to the narrow band noise frequency of a pre-established first reference signal is reduced, and a correlation calculation section to calculate the correlation value between the input signal and the second reference signal utilized in the frame synchronization processing of the input signal.Type: GrantFiled: July 10, 2013Date of Patent: January 20, 2015Assignee: Renesas Electronics CorporationInventors: Kiyoshi Yanagisawa, Osamu Inagawa, Toshiya Aramaki
-
Publication number: 20140363832Abstract: The present invention provides a method for testing mesothelioma comprising a step of determining a concentration of a human periostin protein in at least one type of sample of blood or pleural fluid of a subject. In the step of determining the concentration of human periostin protein, an antibody directed against human periostin protein may be used. The present invention further provides a kit for diagnosing mesothelioma, said kit comprising an antibody directed against human periostin protein. In the kit for diagnosing mesothelioma, the antibody directed against a human periostin protein may be an antibody that binds to a polypeptide consisting of an amino acid sequence set out in SE ID NO: 2.Type: ApplicationFiled: September 14, 2012Publication date: December 11, 2014Applicants: National University Corporation Nagoya University, Oncomics Co., Ltd., Medical & Biological Laboratories Co., Ltd.Inventors: Kiyoshi Yanagisawa, Takashi Takahashi, Kohei Yokoi, Yoshinori Hasegawa, Ken-ichiro Ono, Kasumi Yagi, Hitomi Masuda, Toshiyuki Takeuchi
-
Publication number: 20140334560Abstract: A receiving device according to the present invention includes: a receiver for receiving an OFDM symbol that is modulated by phase shift keying; an FFT processor for applying an FFT process to the received OFDM symbol to obtain a subcarrier signal; a demapping unit for demapping the subcarrier signal to generate a bit string; a norm calculator for calculating the norm of the subcarrier; a weighting factor generator for generating a weighting factor by taking the statistics of the calculated norm; and a weighting unit for obtaining a soft decision value by weighting the bit string after demapping, based on the particular weighting factor. Thus, the receiving device can obtain a soft decision value to achieve good decoding performance with a small number of known signals and processes.Type: ApplicationFiled: July 22, 2014Publication date: November 13, 2014Inventors: Kiyoshi YANAGISAWA, Osamu Inagawa
-
Publication number: 20140241456Abstract: A communication device includes: an amplifier (62) arranged to amplify a reception signal received from one of the plurality of terminals; a first demodulation unit (26) arranged to demodulate a first frame transmitted using a first communication method operable to communicate when CNR is smaller than 0 dB; a second demodulation unit (27) arranged to demodulate, in parallel with the first demodulation unit demodulating the first frame, a second frame transmitted using a second communication method having a rate higher than a rate of the first communication method at a frequency band same as a frequency band used for the first communication method; and a gain controller (64) arranged to adjust a gain of the amplifier in accordance with a detection outcome of a preamble included in the first frame and the second frame.Type: ApplicationFiled: February 20, 2014Publication date: August 28, 2014Applicant: RENESAS ELECTRONICS CORPORATIONInventors: Kiyoshi YANAGISAWA, Osamu INAGAWA
-
Patent number: 8817902Abstract: A receiving device according to the present invention includes: a receiver for receiving an OFDM symbol that is modulated by phase shift keying; an FFT processor for applying an FFT process to the received OFDM symbol to obtain a subcarrier signal; a demapping unit for demapping the subcarrier signal to generate a bit string; a norm calculator for calculating the norm of the subcarrier; a weighting factor generator for generating a weighting factor by taking the statistics of the calculated norm; and a weighting unit for obtaining a soft decision value by weighting the bit string after demapping, based on the particular weighting factor. Thus, the receiving device can obtain a soft decision value to achieve good decoding performance with a small number of known signals and processes.Type: GrantFiled: November 12, 2012Date of Patent: August 26, 2014Assignee: Renesas Electronics CorporationInventors: Kiyoshi Yanagisawa, Osamu Inagawa
-
Publication number: 20140016730Abstract: A semiconductor device contains a narrow band noise detector section to detect narrow band noise in an input signal that is input by way of a power line. The semiconductor device further includes a reference signal generator section to generate a second reference signal whose amplitude value which corresponds to the narrow band noise frequency of a pre-established first reference signal is reduced, and a correlation calculation section to calculate the correlation value between the input signal and the second reference signal utilized in the frame synchronization processing of the input signal.Type: ApplicationFiled: July 10, 2013Publication date: January 16, 2014Inventors: Kiyoshi YANAGISAWA, Osamu INAGAWA, Toshiya ARAMAKI
-
Publication number: 20130294532Abstract: A power line carrier transmission apparatus according to an aspect of the present invention is a power line carrier transmission apparatus that transmits a transmission symbol via a transmission path. The transmission apparatus includes a frequency/time interleave unit that interleaves the transmission symbol, an OFDM modulation unit that OFDM-modulates the interleaved transmission symbol, a time-domain repeated transmission unit that repeatedly transmits the transmission symbol, which is modulated by the OFDM modulation unit, M times (M is an integer larger than 1) in a time domain.Type: ApplicationFiled: April 11, 2013Publication date: November 7, 2013Applicant: Renesas Electronics CorporationInventors: Osamu INAGAWA, Kiyoshi Yanagisawa, Toshiya Aramaki
-
Patent number: 8385458Abstract: A signal processing circuit for compensating for an I/Q amplitude mismatch in which the amplitudes of I- and Q-components of output signals of a quadrature modulator are unequal to or for compensating for an I/Q phase mismatch in which the phase difference between the I- and the Q-components of output signals of the quadrature modulator deviates from 90 degrees.Type: GrantFiled: July 11, 2007Date of Patent: February 26, 2013Assignee: NEC CorporationInventors: Kiyoshi Yanagisawa, Noriaki Matsuno
-
Patent number: 8374265Abstract: A signal processing circuit, a signal processing method and a recording medium suppressing occurrence of unnecessary waves are provided. A timing generation means which generates timing to select a signal of a predetermined local frequency in a set time period and not to select any signal of all local frequencies in a different set time period, and a plurality of switches which switch over a signal of the local frequency from each multiband generator to the transmission mixer by an instruction from the timing generation means are included.Type: GrantFiled: February 3, 2009Date of Patent: February 12, 2013Assignee: NEC CorporationInventors: Akio Tanaka, Kiyoshi Yanagisawa
-
Patent number: 8285508Abstract: An apparatus includes a test signal generation unit supplying test signals to an orthogonal modulator and a control unit that based on a result of decision by comparison and decision of detection results of a detector detecting envelopes of modulated signals output from the orthogonal modulator responsive to the test signals, derives adjustment values and a compensation value. An estimation means estimates a DC offset and an IQ mismatch of the orthogonal modulator, based on the derived compensation value. The test signals includes a first set including a first test signal (I1, Q1) and a second test signal (I2, Q2) having a predetermined relationship with the first test signal, and a second set of which in-phase and quadrature components have predetermined relationships respectively with in-phase and quadrature components of the first set.Type: GrantFiled: July 9, 2008Date of Patent: October 9, 2012Assignee: NEC CorporationInventors: Kiyoshi Yanagisawa, Noriaki Matsuno
-
Patent number: 8184740Abstract: Test signal generator (3) generates test signals represented, by four points, which comprise two sets of two points positioned in point symmetry with respect to the origin of an I/Q orthogonal coordinate system. Envelope detector (8) detects the amplitude of an envelope of the output signal from an orthogonal modulator when the test signals represented by four points are generated, and outputs a signal proportional to the square of the amplitude. Comparing unit (9) calculates an average value of output signals from envelope detector ( ) when the test signals represented by the two points of each set are generated. Controller (10) adjusts the amplitudes and/or phases of the test signals so that the average values produced when the test signals represented by the two sets of the two points are generated are equal to each other, and calculates an I/Q mismatch quantity based on the adjusted results.Type: GrantFiled: March 6, 2007Date of Patent: May 22, 2012Assignee: NEC CorporationInventors: Noriaki Matsuno, Kiyoshi Yanagisawa
-
Patent number: 8059757Abstract: A test signal is generated and supplied to a signal processing circuit for making frequency conversion. A signal outputted from the signal processing circuit is detected to generate a detected signal including a detected positive signal corresponding to the positive signal of the test signal and a detected negative signal corresponding to the negative signal. And the level of the detected positive signal and the level of the detected negative signal are compared to output the comparison result indicating which level is higher. Further, an offset correction signal for making a level difference between the detected positive signal and the detected negative signal within a preset permissible range is generated, based on the comparison result, and offset correction of the test signal or modulated signal supplied from the outside is made in accordance with the offset correction signal.Type: GrantFiled: June 20, 2006Date of Patent: November 15, 2011Assignee: NEC CorporationInventors: Kiyoshi Yanagisawa, Noriaki Matsuno
-
Publication number: 20100296592Abstract: A signal processing circuit, a signal processing method and a recording medium suppressing occurrence of unnecessary waves are provided. A timing generation means which generates timing to select a signal of a predetermined local frequency in a set time period and not to select any signal of all local frequencies in a different set time period, and a plurality of switches which switch over a signal of the local frequency from each multiband generator to the transmission mixer by an instruction from the timing generation means are included.Type: ApplicationFiled: February 3, 2009Publication date: November 25, 2010Inventors: Akio Tanaka, Kiyoshi Yanagisawa
-
Publication number: 20100239056Abstract: A test signal generating part (3) generates test signals of four points where two pairs of points each consist of two points that are point symmetric about the origin point on an I/Q rectangular coordinate system. An envelope determining part (8) determines the amplitudes of output signals of a quadrature modulator at the generation of the four-point test signals, and outputs signals that are proportional to the respective squares of those amplitudes. A comparing part (9) calculates the average value of the output signals from the envelope determining part (8) for each pair of test signals when that pair of test signals are generated. A control part (10) adjusts the amplitudes and/or phases of the test signals in such a mariner that the average values are equal to each other at the generation of two pairs of test signals, and calculates, based on the adjustment result, an I/Q mismatch amount.Type: ApplicationFiled: March 6, 2007Publication date: September 23, 2010Applicant: NEC CORPORATIONInventors: Noriaki Matsuno, Kiyoshi Yanagisawa