Patents by Inventor Kiyoshige Miyawaki

Kiyoshige Miyawaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8837164
    Abstract: There are provided a substrate for mounting a device and a package for housing the device employing the same in which a power semiconductor device can be readily set for a temperature suitable for operation and can thus function in a proper fashion. The substrate for mounting the device includes a support body having, on one main surface of the support body, a device mounting portion for mounting a power semiconductor device, the support body having a plurality of columnar parts that are spaced apart in a thickness direction with respect to the device mounting portion and are arranged apart from each other; and a heat accumulating region which is disposed between the columnar parts and is lower in thermal conductivity than the support body.
    Type: Grant
    Filed: January 22, 2010
    Date of Patent: September 16, 2014
    Assignee: Kyocera Corporation
    Inventors: Kazuhiro Kawabata, Kiyoshige Miyawaki, Yoshiaki Ueda, Shinji Nakamoto, Tsutomu Sugimoto
  • Patent number: 8653649
    Abstract: A device housing package includes a substrate having a device mounting region; a frame body having a through hole formed in part thereof, the frame body being disposed on the substrate so as to lie along a periphery of the device mounting region; and an input-output terminal disposed in the through hole, having a first dielectric layer; a signal line formed on the first dielectric layer; a first ground layer formed on a lower face of the first dielectric layer; a second dielectric layer formed on the signal line so as to overlap the frame body; a second ground layer formed on an upper face of the second dielectric layer; and a metal layer disposed within the second dielectric layer The metal layer is formed to extend from the second dielectric layer to the first dielectric layer, being separated from the signal line.
    Type: Grant
    Filed: September 24, 2010
    Date of Patent: February 18, 2014
    Assignee: Kyocera Corporation
    Inventors: Mahiro Tsujino, Mamoru Kinoshita, Kiyoshige Miyawaki
  • Publication number: 20120147539
    Abstract: A device housing package includes a substrate having a device mounting region; a frame body having a through hole formed in part thereof, the frame body being disposed on the substrate so as to lie along a periphery of the device mounting region; an input-output terminal disposed in the through hole, having a first dielectric layer; a signal line formed on the first dielectric layer; a first ground layer formed on a lower face of the first dielectric layer; a second dielectric layer formed on the signal line so as to overlap the frame body; a second ground layer formed on an upper face of the second dielectric layer; and a metal layer disposed within the second dielectric layer The metal layer is formed to extend from the second dielectric layer to the first dielectric layer, being separated from the signal line.
    Type: Application
    Filed: September 24, 2010
    Publication date: June 14, 2012
    Applicant: KYOCERA CORPORATION
    Inventors: Mahiro Tsujino, Mamoru Kinoshita, Kiyoshige Miyawaki
  • Publication number: 20110273846
    Abstract: There are provided a substrate for mounting a device and a package for housing the device employing the same in which a power semiconductor device can be readily set for a temperature suitable for operation and can thus function in a proper fashion. The substrate for mounting the device includes a support body having, on one main surface of the support body, a device mounting portion for mounting a power semiconductor device, the support body having a plurality of columnar parts that are spaced apart in a thickness direction with respect to the device mounting portion and are arranged apart from each other; and a heat accumulating region which is disposed between the columnar parts and is lower in thermal conductivity than the support body.
    Type: Application
    Filed: January 22, 2010
    Publication date: November 10, 2011
    Applicant: KYOCERA CORPORATION
    Inventors: Kazuhiro Kawabata, Kiyoshige Miyawaki, Yoshiaki Ueda, Shinji Nakamoto, Tsutomu Sugimo
  • Patent number: 4374316
    Abstract: A semiconductor integrated circuit supporter on which a heating element is dielectrically provided, said supporter comprising a package, printed circuit board, mother board, etc. for supporting a semiconductor integrated circuit which includes devices such as transistors.The heating element provided on said semiconductor integrated circuit supporter is capable of heating the whole or a required part only thereof so that the semiconductor integrated circuit is preheated to a temperature required for its normal operation with precision and stability thereby improving the accuracy and reliability of various devices of which a semiconductor integrated circuit is composed as well as the control by said devices.
    Type: Grant
    Filed: August 22, 1980
    Date of Patent: February 15, 1983
    Assignee: Kyoto Ceramic Co., Ltd.
    Inventors: Kazuo Inamori, Kiyoshige Miyawaki