Patents by Inventor Kiyotaka Mori
Kiyotaka Mori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8829494Abstract: An organic thin film transistor comprising source and drain electrodes, an organic semiconductor disposed in a channel region between the source and drain electrodes, a gate electrode, and a dielectric disposed between the source and drain electrodes and the gate electrode, wherein the source electrode and the drain electrode comprise at least one different physical and/or material property from each other.Type: GrantFiled: March 12, 2009Date of Patent: September 9, 2014Assignees: Cambridge Display Technology Limited, Panasonic CorporationInventors: Jonathan James Michael Halls, Craig Edward Murphy, Kiyotaka Mori
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Patent number: 8362479Abstract: A semiconductor device which comprises a channel layer formed from a semiconductor channel component material in the form of crystalline micro particles, micro rods, crystalline nano particles, or nano rods, and doped with a semiconductor dopant.Type: GrantFiled: January 7, 2011Date of Patent: January 29, 2013Assignees: Panasonic Corporation, Cambridge Enterprise Ltd.Inventors: Kiyotaka Mori, Henning Sirringhaus
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Publication number: 20120037901Abstract: The present invention provides highly-stable oxide semiconductors which make it possible to provide devices having an excellent stability. The oxide semiconductor according to the present invention is an amorphous oxide semiconductor including at least one of indium (In), zinc (Zn), and Tin (Sn) and at least one of an alkaline metal or an alkaline earth metal having an ionic radius greater than that of gallium (Ga), and oxygen.Type: ApplicationFiled: April 24, 2009Publication date: February 16, 2012Applicants: CAMBRIDGE ENTERPRISE LTD., PANASONIC CORPORATIONInventors: Kiyotaka Mori, Henning Sirringhaus, Kulbinder Kumar Banger, Rebecca Lorenz Peterson
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Patent number: 8063556Abstract: A cascaded light emitting device. The cascaded light emitting device includes: a base electrode formed of a base electrode material and electrically coupled to a base voltage lead; a top electrode layer formed of a top electrode material and electrically coupled to a top voltage lead; a number of electroluminescent layers arranged between and electrically coupled to the base electrode and top electrode layer; and at least one middle electrode layer formed of a middle electrode material. Each of the middle electrodes is coupled between two juxtaposed electroluminescent layers. The electroluminescent layers include a mixed conductor that luminesces with a peak wavelength.Type: GrantFiled: January 22, 2010Date of Patent: November 22, 2011Assignees: Panasonic Corporation, Cornell Research Foundation, Inc.Inventors: George G. Malliaras, Kiyotaka Mori, Jason D. Slinker, Daniel A. Bernards, Hector D. Abruna
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Patent number: 8026512Abstract: An electroluminescent (EL) device, including a semiconductor structure, a first electrode, and a second electrode. The semiconductor structure includes: a first higher mobility semiconductor layer having a first mobility; a second higher mobility semiconductor layer having a second mobility; and a lower mobility semiconductor layer formed between the first higher mobility semiconductor layer and the higher mobility second semiconductor layer. The lower mobility semiconductor layer has a third mobility that is less than the first mobility and the second mobility. The semiconductor structure includes EL semiconducting material in the first higher mobility semiconductor layer, the second higher mobility semiconductor layer, and/or the lower mobility semiconductor layer. The first electrode is coupled to the first higher mobility semiconductor layer of the semiconductor structure. The second electrode is coupled to the second higher mobility semiconductor layer of the semiconductor structure.Type: GrantFiled: November 16, 2006Date of Patent: September 27, 2011Assignees: Panasonic Corporation, Cornell Research Foundation, Inc.Inventors: Hon Hang Fong, Kiyotaka Mori, George M. Malliaras, Yu Jye Foo
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Publication number: 20110101320Abstract: An organic thin film transistor comprising source and drain electrodes, an organic semiconductor disposed in a channel region between the source and drain electrodes, a gate electrode, and a dielectric disposed between the source and drain electrodes and the gate electrode, wherein the source electrode and the drain electrode comprise at least one different physical and/or material property from each other.Type: ApplicationFiled: March 12, 2009Publication date: May 5, 2011Inventors: Jonathan James Michael Halls, Craig Eward Murphy, Kiyotaka Mori
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Publication number: 20110101344Abstract: A semiconductor device which comprises a channel layer formed from a semiconductor channel component material in the form of crystalline micro particles, micro rods, crystalline nano particles, or nano rods, and doped with a semiconductor dopant.Type: ApplicationFiled: January 7, 2011Publication date: May 5, 2011Applicants: PANASONIC CORPORATION, CAMBRIDGE ENTERPRISE LTD.Inventors: Kiyotaka MORI, Henning SIRRINGHAUS
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Patent number: 7825406Abstract: An organic EL device comprising a semiconductor element A having a source electrode, a drain electrode, and a gate electrode, a semiconductor element B having a source electrode, a drain electrode, and a gate electrode connected to the source electrode or the drain electrode of the semiconductor element A, and an organic EL element having a pixel electrode connected to the drain electrode of the semiconductor element B, in which the source electrode and the drain electrode of the semiconductor element A and the gate electrode of the semiconductor element B are set on the same plane.Type: GrantFiled: May 30, 2008Date of Patent: November 2, 2010Assignee: Panasonic CorporationInventors: Hidehiro Yoshida, Kiyotaka Mori, Shinya Ono, Keisei Yamamuro
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Patent number: 7755275Abstract: A cascaded light emitting device. The cascaded light emitting device includes: a base electrode formed of a base electrode material and electrically coupled to a base voltage lead; a top electrode layer formed of a top electrode material and electrically coupled to a top voltage lead; a number of electroluminescent layers arranged between and electrically coupled to the base electrode and top electrode layer; and at least one middle electrode layer formed of a middle electrode material. Each of the middle electrodes is coupled between two juxtaposed electroluminescent layers. The electroluminescent layers include a mixed conductor that luminesces with a peak wavelength.Type: GrantFiled: March 28, 2005Date of Patent: July 13, 2010Assignees: Panasonic Corporation, Cornell UniversityInventors: George G. Malliaras, Kiyotaka Mori, Jason D Slinker, Daniel A. Bernards, Hector D. Abruna
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Publication number: 20100117518Abstract: A cascaded light emitting device. The cascaded light emitting device includes: a base electrode formed of a base electrode material and electrically coupled to a base voltage lead; a top electrode layer formed of a top electrode material and electrically coupled to a top voltage lead; a number of electroluminescent layers arranged between and electrically coupled to the base electrode and top electrode layer; and at least one middle electrode layer formed of a middle electrode material. Each of the middle electrodes is coupled between two juxtaposed electroluminescent layers. The electroluminescent layers include a mixed conductor that luminesces with a peak wavelength.Type: ApplicationFiled: January 22, 2010Publication date: May 13, 2010Applicants: Cornell Research Foundation, Inc., Matsushita Electric Industrial Co., Ltd.Inventors: George M. Malliaras, Kiyotaka Mori, Jason D. Slinker, Daniel A. Bernards, Hector D. Abruna
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Patent number: 7687870Abstract: A laterally configured electrooptical device including: a substrate having a surface; a first semiconductor layer of a first type semiconductor material; a second semiconductor layer formed of a second type semiconductor material different from the first type semiconductor material; a first electrode; and a second electrode. The lower surface of the first semiconductor layer is coupled to a section of the surface of the substrate. The lower surface of the second semiconductor layer is coupled to the upper surface of the first semiconductor layer to form a junction. The first electrode is directly electrically coupled to one side of the first semiconductor layer and the second electrode is directly electrically coupled to an opposite side of the second semiconductor layer. These electrodes are configured such that the lower surface of the first semiconductor layer and/or the upper surface of the second semiconductor layer are substantially unoccluded by them.Type: GrantFiled: December 29, 2006Date of Patent: March 30, 2010Assignees: Panasonic Corporation, Cornell Research Foundation, Inc.Inventors: Hon Hang Fong, George G. Malliaras, Kiyotaka Mori
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Publication number: 20090321725Abstract: An organic EL device comprising a semiconductor element A having a source electrode, a drain electrode, and a gate electrode, a semiconductor element B having a source electrode, a drain electrode, and a gate electrode connected to the source electrode or the drain electrode of the semiconductor element A, and an organic EL element having a pixel electrode connected to the drain electrode of the semiconductor element B, in which the source electrode and the drain electrode of the semiconductor element A and the gate electrode of the semiconductor element B are set on the same plane.Type: ApplicationFiled: May 30, 2008Publication date: December 31, 2009Applicant: PANASONIC CORPORATIONInventors: Hidehiro Yoshida, Kiyotaka Mori, Shinya Ono, Keisei Yamamuro
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Patent number: 7554621Abstract: A nanostructured integrated circuit including a nanostructured element and a thin film transistor (TFT) and capacitor formed along the nanostructured element. The nanostructured element includes: an inner semiconductor material; and an outer insulating layer. The TFT includes: the inner semiconductor material of the nanostructured element; a source electrode electrically coupled to a source portion of the inner semiconductor material; a drain electrode electrically coupled to a drain portion of the inner semiconductor material; a gate portion of the outer insulating layer located between the source electrode and the drain electrode; and a gate electrode formed on the gate portion. The capacitor includes: a capacitor portion of the outer insulating layer of the nanostructured element; and a capacitor electrode formed on the capacitor portion. The capacitor portion of the outer insulating layer is located between the gate portion of the outer insulating layer and either the drain or source electrode.Type: GrantFiled: June 26, 2006Date of Patent: June 30, 2009Assignee: Panasonic CorporationInventor: Kiyotaka Mori
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Publication number: 20080237650Abstract: A semiconductor device, including: a semiconductor material and an electrode structure electrically coupled to the semiconductor material. The electrode structure includes: a first portion formed of a first conductive material and a second portion formed of a second conductive material. Both the first portion and the second portion of the electrode structure are in direct contact with the semiconductor material. The first conductive material has a first work function and the second conductive material has a second work function that is different from the first work function, so that the second portion of the electrode structure forms a junction with the first portion. The first portion and the second portion of the electrode structure are arranged such that the fringe field from the edge of this junction between the first portion and the second portion extends into the semiconductor material.Type: ApplicationFiled: March 30, 2007Publication date: October 2, 2008Applicants: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD., CORNELL RESEARCH FOUNDATION, INC.Inventors: George G. Malliaras, Kiyotaka Mori, Hon Hang Fong
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Publication number: 20080157105Abstract: A laterally configured electrooptical device including: a substrate having a surface; a first semiconductor layer of a first type semiconductor material; a second semiconductor layer formed of a second type semiconductor material different from the first type semiconductor material; a first electrode; and a second electrode. The lower surface of the first semiconductor layer is coupled to a section of the surface of the substrate. The lower surface of the second semiconductor layer is coupled to the upper surface of the first semiconductor layer to form a junction. The first electrode is directly electrically coupled to one side of the first semiconductor layer and the second electrode is directly electrically coupled to an opposite side of the second semiconductor layer. These electrodes are configured such that the lower surface of the first semiconductor layer and/or the upper surface of the second semiconductor layer are substantially unoccluded by them.Type: ApplicationFiled: December 29, 2006Publication date: July 3, 2008Inventors: Hon Hang Fong, George G. Malliaras, Kiyotaka Mori
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Publication number: 20080116450Abstract: An electroluminescent (EL) device, including a semiconductor structure, a first electrode, and a second electrode. The semiconductor structure includes: a first higher mobility semiconductor layer having a first mobility; a second higher mobility semiconductor layer having a second mobility; and a lower mobility semiconductor layer formed between the first higher mobility semiconductor layer and the higher mobility second semiconductor layer. The lower mobility semiconductor layer has a third mobility that is less than the first mobility and the second mobility. The semiconductor structure includes EL semiconducting material in the first higher mobility semiconductor layer, the second higher mobility semiconductor layer, and/or the lower mobility semiconductor layer. The first electrode is coupled to the first higher mobility semiconductor layer of the semiconductor structure. The second electrode is coupled to the second higher mobility semiconductor layer of the semiconductor structure.Type: ApplicationFiled: November 16, 2006Publication date: May 22, 2008Inventors: Hon Hang Fong, Kiyotaka Mori, George M. Malliaras, Yu Jye Foo
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Publication number: 20080006883Abstract: A nanostructured integrated circuit including a nanostructured element and a thin film transistor (TFT) and capacitor formed along the nanostructured element. The nanostructured element includes: an inner semiconductor material; and an outer insulating layer. The TFT includes: the inner semiconductor material of the nanostructured element; a source electrode electrically coupled to a source portion of the inner semiconductor material; a drain electrode electrically coupled to a drain portion of the inner semiconductor material; a gate portion of the outer insulating layer located between the source electrode and the drain electrode; and a gate electrode formed on the gate portion. The capacitor includes: a capacitor portion of the outer insulating layer of the nanostructured element; and a capacitor electrode formed on the capacitor portion. The capacitor portion of the outer insulating layer is located between the gate portion of the outer insulating layer and either the drain or source electrode.Type: ApplicationFiled: June 26, 2006Publication date: January 10, 2008Inventor: Kiyotaka Mori
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Publication number: 20070272919Abstract: An organic semiconductor device including: a substrate having a first thermal expansion coefficient; and an organic semiconductor material coupled to the substrate at an interface therebetween. The organic semiconductor material includes a polymer organic semiconductor material and/or an oligomer organic semiconductor material. The organic semiconductor material also has a second thermal expansion coefficient that is different from the first thermal expansion coefficient, such that a mechanical stress is transferred from the substrate to the organic semiconductor material through the interface. This mechanical stress is related to the difference between the first and second thermal expansion coefficients and the change in temperature of the organic semiconductor device.Type: ApplicationFiled: August 4, 2006Publication date: November 29, 2007Inventors: Kiyotaka Mori, Daniel Hogan
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Patent number: 7176147Abstract: A semiconductor structure including an insulator layer formed of a first polymer. The structure also includes an organic semiconductor layer formed of a second polymer. The polymers self-assemble into a well-ordered co-polymer structure with the semiconductor layer positioned adjacent the insulator layer. The structure may be an organic, thin-film semiconductor device including, without limitation, a transistor, a multi-gate transistor, a thyristor, and the like. Also disclosed is a process of manufacturing the semiconductor structure.Type: GrantFiled: May 2, 2005Date of Patent: February 13, 2007Assignee: Matsushita Electric Industrial Co., Ltd.Inventor: Kiyotaka Mori
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Publication number: 20060214163Abstract: A semiconductor device including: a substrate and an organic semiconductor material coupled to the substrate at an interface therebetween. The substrate has a first thermal expansion coefficient and the organic semiconductor material has a second thermal expansion coefficient that is different from the first thermal expansion coefficient. The difference between the first thermal expansion coefficient and the second thermal expansion coefficient causes a tensile stress in a plane parallel to the interface to be transferred from the substrate to the organic semiconductor material through the interface. This tensile stress in the plane parallel to the interface causes compression of the organic semiconductor material in a direction normal to the interface.Type: ApplicationFiled: May 25, 2006Publication date: September 28, 2006Inventors: Kiyotaka Mori, Daniel Hogan