Patents by Inventor Kiyotaka Sakamoto
Kiyotaka Sakamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10157961Abstract: Provided are a method of manufacturing a magnetoresistive element and a manufacturing system which are capable of manufacturing a magnetoresistive element achieving further downscaling, i.e., further increase in the degree of integration of the magnetoresistive element while having high magnetic properties. The method includes: preparing a stacked film including one of the two magnetic layers, a layer to form the tunnel barrier layer, and the other of the two magnetic layers, on a substrate; forming multiple separated stacked films on the substrate by separating the stacked film into the multiple stacked films by etching; irradiating side portions of the multiple separated stacked films with ion beams in a pressure-reducible process chamber; and after the irradiation with the ion beams, forming oxide layers or nitride layers on surfaces of the multiple stacked films by introducing an oxidizing gas or a nitriding gas into the process chamber.Type: GrantFiled: May 15, 2017Date of Patent: December 18, 2018Assignee: CANON ANELVA CORPORATIONInventors: Marie Hayashi, Kiyotaka Sakamoto, Masayoshi Ikeda
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Patent number: 9966092Abstract: To provide an ion beam etching method which enables a highly uniform IBE process even under a low-angle-incident static condition, without increase in the size of an apparatus. The ion beam etching method includes: changing a position of an opening portion with respect to a substrate; etching the substrate with an ion beam passing through the opening portion; and reducing a tilt angle as a center of a site where the ion beam is incident on the substrate moves away from the ion source.Type: GrantFiled: December 1, 2016Date of Patent: May 8, 2018Assignee: CANON ANELVA CORPORATIONInventors: Yasushi Kamiya, Hiroshi Akasaka, Kiyotaka Sakamoto
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Patent number: 9844126Abstract: Provided is a plasma treatment apparatus capable of uniform substrate treatment by correction of unevenness in a plasma density distribution. The apparatus has a configuration such that a substrate is treated with plasma, and an evacuated container is provided with an annular antenna arranged around an outer periphery of the container, and is formed of a power supply container, and a process container where the substrate is placed, which communicates with an internal space of the power supply container. The plasma is generated in the power supply container by radio-frequency power supplied to the antenna. The plasma is diffused into the process container by a magnetic field of solenoid coils arranged around an outer periphery of the antenna. The inclination of the magnetic field is adjusted by an inclination adjustment means for adjusting the inclination of the solenoid coils with respect to the process substrate.Type: GrantFiled: June 15, 2012Date of Patent: December 12, 2017Assignee: Canon Aneiva CorporationInventors: Masayoshi Ikeda, Kiyotaka Sakamoto, Akihiro Sawada, Yasumi Sago, Masami Hasegawa, Motozo Kurita
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Publication number: 20170250221Abstract: Provided are a method of manufacturing a magnetoresistive element and a manufacturing system which are capable of manufacturing a magnetoresistive element achieving further downscaling, i.e., further increase in the degree of integration of the magnetoresistive element while having high magnetic properties. The method includes: preparing a stacked film including one of the two magnetic layers, a layer to form the tunnel barrier layer, and the other of the two magnetic layers, on a substrate; forming multiple separated stacked films on the substrate by separating the stacked film into the multiple stacked films by etching; irradiating side portions of the multiple separated stacked films with ion beams in a pressure-reducible process chamber; and after the irradiation with the ion beams, forming oxide layers or nitride layers on surfaces of the multiple stacked films by introducing an oxidizing gas or a nitriding gas into the process chamber.Type: ApplicationFiled: May 15, 2017Publication date: August 31, 2017Inventors: Marie Hayashi, Kiyotaka Sakamoto, Masayoshi Ikeda
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Publication number: 20170098458Abstract: To provide an ion beam etching method which enables a highly uniform IBE process even under a low-angle-incident static condition, without increase in the size of an apparatus. The ion beam etching method includes: changing a position of an opening portion with respect to a substrate; etching the substrate with an ion beam passing through the opening portion; and reducing a tilt angle as a center of a site where the ion beam is incident on the substrate moves away from the ion source.Type: ApplicationFiled: December 1, 2016Publication date: April 6, 2017Inventors: Yasushi Kamiya, Hiroshi Akasaka, Kiyotaka Sakamoto
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Publication number: 20160204342Abstract: Provided are a method of manufacturing a magnetoresistive element and a manufacturing system which are capable of manufacturing a magnetoresistive element achieving further downscaling, i.e., further increase in the degree of integration of the magnetoresistive element while having high magnetic properties. The method includes: preparing a stacked film including one of the two magnetic layers, a layer to form the tunnel barrier layer, and the other of the two magnetic layers, on a substrate; forming multiple separated stacked films on the substrate by separating the stacked film into the multiple stacked films by etching; irradiating side portions of the multiple separated stacked films with ion beams in a pressure-reducible process chamber; and after the irradiation with the ion beams, forming oxide layers or nitride layers on surfaces of the multiple stacked films by introducing an oxidizing gas or a nitriding gas into the process chamber.Type: ApplicationFiled: March 21, 2016Publication date: July 14, 2016Inventors: Marie Hayashi, Kiyotaka Sakamoto, Masayoshi Ikeda
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Publication number: 20120298303Abstract: Provided is a plasma treatment apparatus capable of uniform substrate treatment by correction of unevenness in a plasma density distribution. The apparatus has a configuration such that a substrate is treated with plasma, and an evacuated container is provided with an annular antenna arranged around an outer periphery of the container, and is formed of a power supply container, and a process container where the substrate is placed, which communicates with an internal space of the power supply container. The plasma is generated in the power supply container by radio-frequency power supplied to the antenna. The plasma is diffused into the process container by a magnetic field of solenoid coils arranged around an outer periphery of the antenna. The inclination of the magnetic field is adjusted by an inclination adjustment means for adjusting the inclination of the solenoid coils with respect to the process substrate.Type: ApplicationFiled: June 15, 2012Publication date: November 29, 2012Applicant: CANON ANELVA CORPORATIONInventors: Masayoshi IKEDA, Kiyotaka SAKAMOTO, Akihiro SAWADA, Yasumi SAGO, Masami HASEGAWA, Motozo KURITA
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Publication number: 20090078569Abstract: An inductively coupled plasma processing apparatus according to the present invention prevents debris formed through a sputter etching operation from forming a film on an inner face of a side wall part 14 of a dielectric wall container 11 and a high-frequency power from being hindered to be supplied. All of straight lines which start from any one point on the outermost perimeter of an article to be processed 2 and pass through a plasma introduction port 12 form an intersecting point with the bottom part 13 of the dielectric wall container 11 on the inner face of the bottom part 13, in the inductively coupled plasma processing apparatus.Type: ApplicationFiled: September 15, 2008Publication date: March 26, 2009Applicant: CANON ANELVA CORPORATIONInventors: Hirohisa Hirayanagi, Kiyotaka Sakamoto, Tomoaki Osada, Yoshimitsu Kodaira
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Patent number: 5858834Abstract: In a method for forming a cylindrical capacitor lower plate in a semiconductor device, a first insulating film, a first conducting film and a second insulating film are formed on a principal surface of a semiconductor substrate in the named order. A patterned photoresist film is formed on the second insulating film, and the second insulating film is patterned by an anisotropic etching using the photoresist film as a mask. After the photoresist film is removed, the first conducting film is patterned by an etching using the patterned second insulating film as a mask. Thereafter, a second conducting film is deposited on a whole surface, and then, the second conducting film is anisotropically etched so that a remaining second conducting film is left on a side surface of the patterned first conducting film. The patterned second insulating film is removed, so that the remaining second conducting film is left in the form of a sidewall which is upright from a periphery of the patterned first conducting film.Type: GrantFiled: February 28, 1997Date of Patent: January 12, 1999Assignee: NEC CorporationInventors: Toshiyuki Hirota, Kiyotaka Sakamoto, Shuji Fujiwara
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Patent number: 5699223Abstract: An apparatus for controlling the voltage applied to an electrostatic clamp enables a substrate removing method capable of rapidly, securely and safely removing a substrate regardless of the presence of a dielectric material on the back surface of the substrate to be processed. Before the substrate supported on an electrode by electrostatic clamping is removed, the potential difference between the substrate and the electrode is made zero, and plasma generation is then stopped. The apparatus for controlling the applied voltage has a circuit for detecting the maximum high-frequency voltage (Vpp) for generating a plasma, an operation circuit for computing the self-bias voltage (Vdc) from the maximum high-frequency voltage (Vpp), and an output control circuit for controlling the DC voltage output from a DC power source based on the self-bias voltage (Vdc).Type: GrantFiled: March 24, 1995Date of Patent: December 16, 1997Assignee: Anelva CorporationInventors: Supika Mashiro, Kiyotaka Sakamoto
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Patent number: 5314388Abstract: In an oil-operated tensioner for applying tension to a power-transmitting chain, a ball check valve is positioned above the oil chamber, either in the tensioner housing, or in the plunger. The ball of the check valve can oscillate when air is present in the oil chamber, since air is compressible. Oscillation of the ball, which occurs when the plunger oscillates during operation of the tensioner, allows the residual air to be discharged from the oil chamber. However, after the air is discharged, oscillation of the plunger is restrained by the incompressibility of the oil, and oscillation of the ball is restrained by the viscosity of the oil which then surrounds the ball. The valve seat of the check valve preferably opens upwardly so that oil splash is accumulated in the valve seat to prevent entry of air through the check valve upon sudden projecting movement of the plunger.Type: GrantFiled: June 10, 1993Date of Patent: May 24, 1994Assignee: Tsubakimoto Chain Co.Inventors: Tadasu Suzuki, Kiyotaka Sakamoto