Patents by Inventor Kiyotaka Tomiyama

Kiyotaka Tomiyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230139257
    Abstract: Provided is a power conversion device which comprises a main circuit board, a first board, and a second board and which has a reduced size. The main circuit board has a rectifier circuit and an inverter circuit which are disposed in a high-power section, the rectifier circuit rectifying AC voltage and The second board is provided with a The first board is connected to the main circuit board and to the second board, and is provided with: a first circuit disposed in a low-power section. The second board is provided with a second circuit disposed in a low-power section. section from each other in a reinforced manner; an insulating transformer disposed in the reinforced insulation region and constituting a constituent component of a power supply circuit for receiving the DC voltage and supplying power to the first circuit and to the second circuit; and an insulating element disposed in the reinforced insulation region and allowing a signal to be exchanged between the first circuit and the second circuit.
    Type: Application
    Filed: April 20, 2020
    Publication date: May 4, 2023
    Inventors: Fumihiro SATO, Keisuke TANABE, Koji HAMANO, Kiyotaka TOMIYAMA, Hiroyoshi MIYAZAKI
  • Patent number: 6720646
    Abstract: In a semiconductor device, a lead frame is adhered to a base substrate for heat dissipation via an insulating layer, and an outward guided terminal portion is formed by perpendicularly upwardly bending an end of the lead frame after the mounting of one or more of power semiconductor elements on the lead frame. A recessed portion is formed beforehand in a portion of the lead frame to be bent, and it is ensured that the lead frame does not adhere to the surface of the base substrate in this recessed portion when the lead frame is adhered to the base substrate via the insulating layer before the bending of the lead frame. By virtue of this structure, manufacturing is simplified and manufacturing costs are reduced.
    Type: Grant
    Filed: March 11, 2003
    Date of Patent: April 13, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Yasushi Sasaki, Shogo Tani, Yoshihiro Uchino, Kiyotaka Tomiyama, Yutaka Maeno
  • Publication number: 20030146501
    Abstract: In a semiconductor device, a lead frame is adhered to a base substrate for heat dissipation via an insulating layer, and an outward guided terminal portion is formed by perpendicularly upwardly bending an end of the lead frame after the mounting of one or more of power semiconductor elements on the lead frame. A recessed portion is formed beforehand in a portion of the lead frame to be bent, and it is ensured that the lead frame does not adhere to the surface of the base substrate in this recessed portion when the lead frame is adhered to the base substrate via the insulating layer before the bending of the lead frame. By virtue of this structure, manufacturing is simplified and manufacturing costs are reduced.
    Type: Application
    Filed: March 11, 2003
    Publication date: August 7, 2003
    Inventors: Yasushi Sasaki, Shogo Tani, Yoshihiro Uchino, Kiyotaka Tomiyama, Yutaka Maeno
  • Patent number: 6541851
    Abstract: In a semiconductor device, a lead frame is adhered to a base substrate for heat dissipation via an insulating layer, and an outward guided terminal portion is formed by perpendicularly upwardly bending an end of the lead frame after the mounting of one or more of power semiconductor elements on the lead frame. A recessed portion is formed beforehand in a portion of the lead frame to be bent, and it is ensured that the lead frame does not adhere to the surface of the base substrate in this recessed portion when the lead frame is adhered to the base substrate via the insulating layer before the bending of the lead frame. By virtue of this structure, manufacturing is simplified and manufacturing costs are reduced.
    Type: Grant
    Filed: July 20, 2001
    Date of Patent: April 1, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Yasushi Sasaki, Shogo Tani, Yoshihiro Uchino, Kiyotaka Tomiyama, Yutaka Maeno
  • Publication number: 20020008312
    Abstract: There is provided a semiconductor device composed of lead frame in which the possibility of a complicated manufacturing process is prevented and a reduction in manufacturing cost can be satisfactorily achieved.
    Type: Application
    Filed: July 20, 2001
    Publication date: January 24, 2002
    Inventors: Yasushi Sasaki, Shogo Tani, Yoshihiro Uchino, Kiyotaka Tomiyama, Yutaka Maeno