Patents by Inventor Kiyotake Ando

Kiyotake Ando has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Code synchronization circuit, delay time measurement device, control method, control program, and computer-readable storage medium
    Patent number: 8169948
    Abstract: A code synchronization circuit for a delay time measurement device used in a low C/N environment is provided. The code synchronization circuit is capable of high precision timing phase measurement and stable operation against variations in the reception level.
    Type: Grant
    Filed: November 16, 2007
    Date of Patent: May 1, 2012
    Assignees: National University Corporation Nara Institute of Science and Technology, Sky Perfect Jsat Corporation
    Inventors: Mayumi Osato, Takao Hara, Kiyotake Ando
  • CODE SYNCHRONIZATION CIRCUIT, DELAY TIME MEASUREMENT DEVICE, CONTROL METHOD, CONTROL PROGRAM, AND COMPUTER-READABLE STORAGE MEDIUM
    Publication number: 20100316038
    Abstract: A code synchronization circuit for a delay time measurement device used in a low C/N environment is provided. The code synchronization circuit is capable of high precision timing phase measurement and stable operation against variations in the reception level.
    Type: Application
    Filed: November 16, 2007
    Publication date: December 16, 2010
    Inventors: Mayumi Osato, Takao Hara, Kiyotake Ando
  • Transmitter and receiver
    Patent number: 7804764
    Abstract: The transmitter of one embodiment of the present invention includes: a S/P section for converting original serial data to parallel data which will correspond to a plurality of subcarriers; and a second IFFT section for converting the parallel data from the frequency domain to the time domain. The transmitter includes, between the S/P section and the second IFFT section, a first IFFT section for modulating the plurality of subcarriers using elements of a matrix derived from an expression for Inverse Discrete Fourier Transform involving time domain signal levels and frequency domain signal levels. The configuration enables CI and PO-CI to be implemented on transmitters and receivers with a simple configuration.
    Type: Grant
    Filed: August 1, 2006
    Date of Patent: September 28, 2010
    Assignees: National University Corporation Nara Institute of Science and Technology, Sky Perfect JSAT Corporation
    Inventors: Takao Hara, Anwar Khoirul, Kiyotake Ando
  • Transmitter and Receiver
    Publication number: 20080219147
    Abstract: The transmitter of one embodiment of the present invention includes: a S/P section for converting original serial data to parallel data which will correspond to a plurality of subcarriers; and a second IFFT section for converting the parallel data from the frequency domain to the time domain. The transmitter includes, between the S/P section and the second IFFT section, a first IFFT section for modulating the plurality of subcarriers using elements of a matrix derived from an expression for Inverse Discrete Fourier Transform involving time domain signal levels and frequency domain signal levels. The configuration enables CI and PO-CI to be implemented on transmitters and receivers with a simple configuration.
    Type: Application
    Filed: August 1, 2006
    Publication date: September 11, 2008
    Inventors: Takao Hara, Anwar Khoirul, Kiyotake Ando