Abstract: A ghost canceller includes a ghost cancelling circuit, waveform memories, a CPU, a training signal generating circuit, and a ghost variation detection circuit. By taking in GCR signals from the waveform memories into the CPU, synchronous addition and field sequence processing are effected, and they are transferred to the training signal generating circuit. The input video signal is changed over to the training signal to cancel ghosts, and when ghost variations are is not detected by the ghost variation detection circuit, the input video signal is fed into the ghost cancelling circuit, and is delivered as an output video signal.

Abstract: A ghost cancelling reference signal transmission/reception system, which allows a built-in ghost cancelling device to eliminate group-delay distortion, frequency-amplitude characteristic distortion, ghost components generated in a signal transmission path. A digital signal is superposed on a television signal in a vertical blanking period of the television signal as a ghost cancelling reference signal.

Abstract: A high frequency amplifier circuit based on an amplifying transistor, e.g. a dual-gate FET, having an A.G.C. voltage applied to a control terminal thereof to control the transistor DC operating current, has a diode connected between an input electrode of the transistor and a source of an input high frequency signal. All or part of the DC operating current of the transistor is passed through the diode as the operating current of the diode to thereby produce a high degree of attenuation by the diode when the transistor current level is small, so that reduced cross modulation interference is produced by the transistor when a high degree of gain reduction is executed by A.G.C. control.

Abstract: A signal receiver generates a reference signal that sweeps frequencies of desired channel bands, and then feeds the reference signal to an input terminal of receiver unit via a signal-switching circuit that performs switching of the desired-channel signal and the reference signal. The signal receiver then detects the signal strength present in plural frequencies of intermediate frequencies delivered to an output terminal of the reference signal, and after storing detected signal data in a memory, the signal receiver compares the detected signal data to desired frequency characteristics. Then, the signal receiver determines tuning voltages of respective tuning circuits so that the differences which arose from the comparison can be minimized. After determining the tuning voltages, these voltages are delivered to respective tuning circuits, and then a switching operation between the reference signal and the desired channel signal is executed before the signal receiver eventually receives the switched signal.

Abstract: A transmitter/receiver system for converting digital information into a multi-frequency signal for transmission. A reference frequency signal is first transmitted, then a series of frequencies having information indicative of differences with the reference signal are transmitted, and a receiver discriminates differences with the reference frequency signal to decode the information.

Abstract: In a radio transceiver having a transceiver unit and a remote control unit, a remote control system in which the operation of the transceiver unit is controlled by control signals coupled synchronously from the remote control unit. The remote control unit has a volume control, a squelch level control, a transmit/receive control switch, a channel select code converter etc., and analog and digital switches for synchronously coupling the above signals. The transceiver unit is capable of transmitting/receiving a plurality of radio signals at preselected frequencies and the operation is controlled by signals regenerated synchronously from the control signals received from the remote control unit.

Abstract: A phase locked loop circuit comprises a phase comparator having an operation range with specific limits for phase comparing. A voltage-controlled oscillator produces an output at the output of the phase locked loop. At the same time, the oscillator output is fed to the phase comparator. A detector circuit, supplied with the output of the phase comparator, detects any exceeding of a specific limit of the phase by comparing the operation range of the phase comparator with a phase deviation of the oscillator output signal fed to the phase comparator. The detector produces an output correction voltage. An adder circuit adds this output correction voltage and an output error voltage of the phase comparator and supplies the resulting added voltage, as a control voltage, to the voltage-controlled oscillator. This phase locked loop operates in a state wherein the lock range thereof has been equivalently expanded by the correction voltage.

Abstract: An angle modulation system comprises a voltage controlled oscillator, and at least one frequency divider for dividing the frequency of the output of the voltage controlled oscillator. A phase comparator responds to the output of the frequency divider and to a reference signal supplied from a reference signal oscillator, through another frequency divider. A frequency selection circuit is provided in the path extending from the output side of the voltage controlled oscillator, through the frequency divider, to the phase comparator. This selection circuit eliminates an undesired side band component in the output of the voltage controlled oscillator and derives a required carrier component. An adder adds an input modulation signal and the output of the phase comparator, and applies the resulting signal to the voltage controlled oscillator. From the output of the voltage controlled oscillator, an angle-modulated wave signal is derived with a large signal to noise ratio and large modulation index.

Abstract: A display device for a display panel which is operated by both polarities of an applied voltage has a segment driving device connected to a segmental electrode of the display panel, a display controlling device connected to the power source, a resistive element connected between the segmental electrode and the display controlling device, and another resistive element connected between the display controlling device and the common electrode of the display panel. The voltage across the segmental electrode and the common electrode is provided by the segment driving device only when the display controlling device is in a short-circuited condition.