Patents by Inventor Kiyoto Araki

Kiyoto Araki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210382087
    Abstract: A probe element includes a conduction pin, a cylindrical barrel, and a bushing. The barrel accommodates the conduction pin inside thereof such that the tip portion of the conduction pin is exposed to the outside. The bushing holds the conduction pin inside the barrel in a state in which the tip portion is movable, and has predetermined permittivity. The conduction pin includes a tip portion, an intermediate portion partially accommodating the tip portion, and a cylindrical socket portion coupled to the intermediate portion. A distance between the socket portion and the inner wall surface of the barrel, and a distance between the intermediate portion and the inner wall surface of the barrel in a direction orthogonal to an extending direction of the barrel are different from each other.
    Type: Application
    Filed: August 25, 2021
    Publication date: December 9, 2021
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Jun TODA, Kiyoto ARAKI
  • Publication number: 20210263071
    Abstract: A probe is connected to a signal conductor of a signal cable when used, and is capable of coming into contact with a signal conductor of a mating receptacle. The probe includes a barrel that is a tubular conductor and that is electrically connectable to the signal conductor of the signal cable; a plunger that is a conductor and has a proximal end disposed in the barrel and a distal end projecting from the barrel and is configured to come into contact with the mating receptacle; and a coil spring disposed in the barrel. The coil spring urges the proximal end of the plunger in a direction toward the distal end of the plunger. The barrel includes a contact portion that is in contact with the plunger at a position closer to a distal end of the barrel than the proximal end of the plunger.
    Type: Application
    Filed: May 11, 2021
    Publication date: August 26, 2021
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Kiyoto ARAKI, Jun TODA
  • Patent number: 9893270
    Abstract: A method for manufacturing a piezoelectric bulk acoustic wave element by forming a sacrificial layer on a part of a primary surface of a substrate. A piezoelectric film sandwiched between a pair of electrodes is formed on the primary surface of the substrate so as to cover the sacrificial layer, the piezoelectric film being formed from scandium-containing aluminum nitride having a scandium atomic concentration with respect to the total number of scandium atoms and aluminum atoms of more than 24 atomic percent. An etching step of removing the sacrificial layer by etching is performed. Prior to the etching step, a protective film formed from aluminum nitride or scandium-containing aluminum nitride having a lower scandium atomic concentration than that of the piezoelectric film is provided so as to cover at least a part of a portion of the piezoelectric film located in a region in which the sacrificial layer is provided.
    Type: Grant
    Filed: August 13, 2014
    Date of Patent: February 13, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kiyoto Araki, Keiichi Umeda
  • Patent number: 9653676
    Abstract: A method for manufacturing a piezoelectric device including a piezoelectric thin film, a support member, a first electrode, and a cavity formed at a support member side of the first electrode between the piezoelectric thin film and the support member includes forming a sacrificial layer in an area to define the cavity, forming an etching adjustment layer which adjusts progress of etching in a region where the first electrode is exposed to a side of the piezoelectric thin film, simultaneously forming a through hole through which a portion of the sacrificial layer is exposed to the side of the piezoelectric thin film and an opening which the first electrode is exposed to the side of the piezoelectric thin film by etching the piezoelectric thin film and the etching adjustment layer, and removing the sacrificial layer through the through hole.
    Type: Grant
    Filed: April 23, 2014
    Date of Patent: May 16, 2017
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Kiyoto Araki
  • Publication number: 20160079218
    Abstract: An electrostatic protection device includes a base member formed of a high-resistance semiconductor material. External connecting lands are formed on a first principal surface of the base member along a first direction with a space therebetween. A diode section is formed in the first principal surface of the base member through a semiconductor forming process. The diode section is formed between formation regions of the external connecting lands along the first direction. A high concentration region is a region that has the same polarity as the base member and contains larger amounts of impurities than the base member. The high concentration region is formed in a ring shape enclosing the diode section in a plan view of the base member.
    Type: Application
    Filed: November 9, 2015
    Publication date: March 17, 2016
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Kiminori WATANABE, Seiichi SATO, Toshiya WATANABE, Tadayuki OKAWA, Kiyoto ARAKI, Teiji YAMAMOTO
  • Publication number: 20150137138
    Abstract: A transistor that offers a high dielectric breakdown voltage of a gate insulating film with limited reduction of the current flowing between drain and source electrodes. The transistor has a semiconductor layer, a gate insulating film on the semiconductor layer, a gate electrode on the gate insulating film, and a source electrode and a drain electrode disposed on the semiconductor layer with the gate electrode therebetween. The concentration of the impurities contained in the gate insulating film is on a downward gradient starting at the surface of the gate insulating film on the semiconductor layer side and ending at the surface of the gate insulating film on the gate electrode side.
    Type: Application
    Filed: December 17, 2014
    Publication date: May 21, 2015
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Kiyoto ARAKI, Shotaro HASHIMOTO, Masakazu TAKAO
  • Publication number: 20140354110
    Abstract: A method for manufacturing a piezoelectric bulk acoustic wave element by forming a sacrificial layer on a part of a primary surface of a substrate. A piezoelectric film sandwiched between a pair of electrodes is formed on the primary surface of the substrate so as to cover the sacrificial layer, the piezoelectric film being formed from scandium-containing aluminum nitride having a scandium atomic concentration with respect to the total number of scandium atoms and aluminum atoms of more than 24 atomic percent. An etching step of removing the sacrificial layer by etching is performed. Prior to the etching step, a protective film formed from aluminum nitride or scandium-containing aluminum nitride having a lower scandium atomic concentration than that of the piezoelectric film is provided so as to cover at least a part of a portion of the piezoelectric film located in a region in which the sacrificial layer is provided.
    Type: Application
    Filed: August 13, 2014
    Publication date: December 4, 2014
    Inventors: Kiyoto Araki, Keiichi Umeda
  • Publication number: 20140231382
    Abstract: A piezoelectric device prevents damage to a piezoelectric thin film caused by etching and the manufacturing cost of the piezoelectric device is reduced. On a surface of a support layer formed on a support substrate, an etching adjustment layer is formed. An etchant flows through etching windows to simultaneously form a through hole through which a portion of a sacrificial layer is exposed to a side of a piezoelectric thin film and an opening through which the etching adjustment layer, which is conductive with a lower electrode, is exposed to the side of the piezoelectric thin film. By making an etchant flow through the through hole, the sacrificial layer is removed. A lead-out wiring is formed between an upper electrode and a bump pad and a lead-out wiring is formed between the conductive etching adjustment layer, which is conductive with the lower electrode, and a bump pad.
    Type: Application
    Filed: April 23, 2014
    Publication date: August 21, 2014
    Applicant: Murata Manufacturing Co., Ltd.
    Inventor: Kiyoto ARAKI
  • Patent number: 8764998
    Abstract: A method for manufacturing a composite substrate that prevents undesirable effects of etching a thin film includes a pattern forming step, an ion implanting step, a bonding step, and a separation step. In the pattern forming step, a pattern region and a reverse pattern region are formed on a principal surface of a functional material substrate. In the ion implanting step, by implanting ions into the functional material substrate, a separation layer is formed inside at a certain distance from the surface of each of the pattern region and the reverse pattern region. In the bonding step, the functional material substrate at the pattern region is bonded to a supporting substrate. In the separation step, the pattern region is separated from the functional material substrate, and the reverse pattern region is made to fall off.
    Type: Grant
    Filed: July 28, 2011
    Date of Patent: July 1, 2014
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Kiyoto Araki, Takashi Iwamoto, Hajime Kando
  • Patent number: 8749119
    Abstract: A piezoelectric device prevents damage to a piezoelectric thin film caused by etching and the manufacturing cost of the piezoelectric device is reduced. On a surface of a support layer formed on a support substrate, an etching adjustment layer is formed. An etchant flows through etching windows to simultaneously form a through hole through which a portion of a sacrificial layer is exposed to a side of a piezoelectric thin film and an opening through which the etching adjustment layer, which is conductive with a lower electrode, is exposed to the side of the piezoelectric thin film. By making an etchant flow through the through hole, the sacrificial layer is removed. A lead-out wiring is formed between an upper electrode and a bump pad and a lead-out wiring is formed between the conductive etching adjustment layer, which is conductive with the lower electrode, and a bump pad.
    Type: Grant
    Filed: August 7, 2012
    Date of Patent: June 10, 2014
    Assignee: Murata Manufacturing Co, Ltd.
    Inventor: Kiyoto Araki
  • Publication number: 20130193809
    Abstract: A piezoelectric device prevents damage to a piezoelectric thin film caused by etching and the manufacturing cost of the piezoelectric device is reduced. On a surface of a support layer formed on a support substrate, an etching adjustment layer is formed. An etchant flows through etching windows to simultaneously form a through hole through which a portion of a sacrificial layer is exposed to a side of a piezoelectric thin film and an opening through which the etching adjustment layer, which is conductive with a lower electrode, is exposed to the side of the piezoelectric thin film. By making an etchant flow through the through hole, the sacrificial layer is removed. A lead-out wiring is formed between an upper electrode and a bump pad and a lead-out wiring is formed between the conductive etching adjustment layer, which is conductive with the lower electrode, and a bump pad.
    Type: Application
    Filed: August 7, 2012
    Publication date: August 1, 2013
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventor: Kiyoto ARAKI
  • Patent number: 8319394
    Abstract: Provided are an acoustic wave device and a method for manufacturing the same, the acoustic wave device being effectively prevented from expanding and contracting due to temperature change and having a small frequency shift. The acoustic wave device of the present invention has a piezoelectric substrate (1) having an IDT (2) formed on one principal surface of the piezoelectric substrate (1), and a thermal spray film (3) formed on an opposite principal surface (1b) of the piezoelectric substrate (1), the thermal spray film being of a material having a smaller linear thermal expansion coefficient than the piezoelectric substrate (1) and having grain boundaries and pores (4), at least a part of which is filled with a filling material (5).
    Type: Grant
    Filed: November 26, 2008
    Date of Patent: November 27, 2012
    Assignees: Murata Manufacturing Co., Ltd., Koike Co., Ltd.
    Inventors: Toshiyuki Fuyutsume, Taro Nishino, Hisashi Yamazaki, Kiyoto Araki, Noboru Tamura, Nakaba Ichikawa, Masaki Aruga
  • Publication number: 20110277928
    Abstract: A method for manufacturing a composite substrate that prevents undesirable effects of etching a thin film includes a pattern forming step, an ion implanting step, a bonding step, and a separation step. In the pattern forming step, a pattern region and a reverse pattern region are formed on a principal surface of a functional material substrate. In the ion implanting step, by implanting ions into the functional material substrate, a separation layer is formed inside at a certain distance from the surface of each of the pattern region and the reverse pattern region. In the bonding step, the functional material substrate at the pattern region is bonded to a supporting substrate. In the separation step, the pattern region is separated from the functional material substrate, and the reverse pattern region is made to fall off.
    Type: Application
    Filed: July 28, 2011
    Publication date: November 17, 2011
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Kiyoto ARAKI, Takashi IWAMOTO, Hajime KANDO
  • Publication number: 20100301700
    Abstract: Provided are an acoustic wave device and a method for manufacturing the same, the acoustic wave device being effectively prevented from expanding and contracting due to temperature change and having a small frequency shift. The acoustic wave device of the present invention has a piezoelectric substrate (1) having an IDT (2) formed on one principal surface of the piezoelectric substrate (1), and a thermal spray film (3) formed on an opposite principal surface (1b) of the piezoelectric substrate (1), the thermal spray film being of a material having a smaller linear thermal expansion coefficient than the piezoelectric substrate (1) and having grain boundaries and pores (4), at least a part of which is filled with a filling material (5).
    Type: Application
    Filed: November 26, 2008
    Publication date: December 2, 2010
    Applicants: MURATA MANUFACTURING CO., LTD., KOIKE CO., LTD.
    Inventors: Toshiyuki Fuyutsume, Taro Nishino, Hisashi Yamazaki, Kiyoto Araki, Noboru Tamura, Nakaba Ichikawa, Masaki Aruga