Abstract: A test carrier 10A comprises: a base board 21A which holds a die 90; and a cover board 31A which is laid over the base board 21A so as to cover the die 90. The test carrier 10A comprises a seal member 24 which is interposed between the base board 21A and the cover board 31A and which surrounds the die 90.

Abstract: A test carrier which can suppress the occurrence of contact defects while securing positional precision of the terminals is provided. A test carrier 10 comprises: a base film 40 which has one main surface which has bumps which contact electrodes 91 of the die 90; and a cover film 70 which is laid over the base film 40, the die 90 is held between the base film 40 and the cover film 70, the base film 40 has: a first region 40a which has a first thickness t1; and a second region 40b which has a second thickness t2 which is thinner than the first thickness t1, and the second region 40b faces at least a part of the edge 92 of the die 90.

Abstract: [Problem] A test carrier able to secure a high air-tightness is provided. [Solution] A test carrier 10 comprises a cover member 50A and a base member 20A which are bonded together while sandwiching a die 90 between them. ultraviolet rays can pass through the cover member 50A.

Abstract: A socket which enables occurrence of contact defects to be suppressed is provided. A socket 11 to which a test carrier 20, which has: a base film 32 on which bumps 324 are formed for contact with electrode pads 51 of a die 50; and external terminals 312 which are electrically connected to the bumps 324, is electrically connected comprises: contactors 125 which contact external terminals 312; and an elastic member 131 which pushes against bump-forming portions 32a and bump-surrounding portions 32b on the base film 32. The elastic member 131 has: a first elastic layer 132; and a second elastic layer 133 which is more flexible than the first elastic layer 132, and a second elastic layer 133 is laid over the first elastic layer 132 and contacts the base film 32.

Abstract: A test carrier which can suppress the occurrence of contact defects and secure positional precision of the terminals is provided. The test carrier 10 comprises: a film-shaped base film 40 which has a plurality of bumps 43 which respectively contact electrode pads 91 of a die 90; and a cover film 70 which is laid over the base film 40 and which covers the die 90, and the plurality of bumps 43 include first bumps 43a and second bumps 43b which are relatively higher than the first bumps 43a.

Abstract: A test carrier which enables a reduction of cost to be achieved. The test carrier 10 comprises: a base film 40 which holds a die 90; and a film-shaped cover film 70 which is laid over the base film 40 and covers the die 90, the cover film 70 has a self-adhesiveness and is more flexible than the base film 40.

Abstract: A test carrier which can suppress the occurrence of contact defects and secure positional precision of the terminals is provided. The test carrier 10 comprises: a base film 40 which has bumps 43 which contact the electrode pads 91 of the die 90; a cover film 70 which is laid over the base film 40 and which covers the die 90; and a spacer 45 which is interposed between the base film 40 and the cover film 70 and which is arranged around the die 90.

Abstract: A test carrier which can suppress the occurrence of contact defects while securing positional precision of the terminals is provided. A test carrier 10 comprises: a base film 40 which has one main surface which has bumps which contact electrodes 91 of the die 90; and a cover film 70 which is laid over the base film 40, the die 90 is held between the base film 40 and the cover film 70, the base film 40 has: a first region 40a which has a first thickness t1; and a second region 40b which has a second thickness t2 which is thinner than the first thickness t1, and the second region 40b faces at least a part of the edge 92 of the die 90.

Abstract: A test carrier 10A comprises: a base board 21A which holds a die 90; and a cover board 31A which is laid over the base board 21A so as to cover the die 90. The test carrier 10A comprises a seal member 24 which is interposed between the base board 21A and the cover board 31A and which surrounds the die 90.

Abstract: A test carrier 10 comprises: a film-shaped base film 40 which has first bumps 42 which contact test pads 91 of a die 90; and a cover film 70 which is superposed over the base film 40, and the test carrier 10 holds the die 90 between the base film 40 and the cover film 70. The first bumps 42 are relatively higher than second bumps 92 which the die 90 has.

Abstract: A test carrier includes a base member and a cover member between which a die is interposed. The base film of the base member has: first interconnect patterns which are formed in advance; and a printing region where second interconnect patterns which electrically connect to the first interconnect patterns are to be formed by printing.

Abstract: [Problem] A test carrier able to secure a high air-tightness is provided. [Solution] A test carrier 10 comprises a cover member 50A and a base member 20A which are bonded together while sandwiching a die 90 between them. ultraviolet rays can pass through the cover member 50A. [Selected Drawings] FIG.

Abstract: Provided is a method for producing a contact device, including a step of forming a first conductive film; a step of forming a second conductive film containing a metal or an alloy of the metal on the first conductive film; a step of forming a third conductive film on the second conductive film; and a step of forming a surface layer on the third conductive film, the surface layer containing an oxidative product of the metal in the second conductive film, which metal has been diffused to be precipitated out from the surface of the third conductive film and oxidized.

Abstract: Provided is a delay line that prevents reflection signals output from a test signal generator from being superimposed as noise. The delay line delays an electrical signal input into a signal line and outputs the thus delayed signal, and includes three or more passive elements that are provided on the signal line and delay the signal. Each section of the signal line between pairs of adjacent passive elements has a different electrical length. The reflection signals reflected by the passive elements are superimposed on each other at different phases. It is desirable that the reflection signals reflected by adjacent passive elements differ by 180 degrees.

Abstract: Provided is a method for producing a contact device, including a step of forming a first conductive film; a step of forming a second conductive film containing a metal or an alloy of the metal on the first conductive film; a step of forming a third conductive film on the second conductive film; and a step of forming a surface layer on the third conductive film, the surface layer containing an oxidative product of the metal in the second conductive film, which metal has been diffused to be precipitated out from the surface of the third conductive film and oxidized.

Abstract: A microswitch that switches a signal path of a high-frequency signal is provided. The microswitch includes a circuit board; a pair of first feedthrough lines spaced from each other on a circuit board that electrically connect the first surface and the second surface of the circuit board, respectively; a pair of first signal lines which are faced to each other with a gap therebetween on a straight line connecting the pair of first feedthrough lines on the first surface of the circuit board and electrically connected to the pair of first feedthrough lines, respectively; and a movable section which can switch between being in contact with and being spaced from the first surface of the circuit board and electrically connects the pair of signal lines with each other when the it is in contact with the first surface of the circuit board.

Abstract: An ohmic contact electrode for a semiconductor device which has a low contact resistance and high stability. The ohmic contact electrode includes: a semiconductor substrate; an atomic doping layer developed on the semiconductor substrate wherein the atomic doping layer is formed by doping impurities such that an energy level of the layer is higher than a Fermi level; a semiconductor layer developed on the atomic doping layer wherein the semiconductor layer is formed of the same material as in the semiconductor substrate; a metal electrode formed on the semiconductor layer for establishing an electric connection with the semiconductor substrate; wherein the semiconductor layer has a thickness sufficient for carriers to transfer between the metal electrode and the atomic doping layer by tunneling through the semiconductor layer.