Abstract: A tracking system for optical storage media e.g. an optical disk, comprising a matrix of four sensors receiving a beam reflected by the disk; one processing channel for each sensor signal, including means for producing a binary signal from the sensor signal, and an adjustable edge delay circuit operating on the binary signal; one adder for each pair of channels corresponding to diagonal sensors of the matrix; and a phase detector comparing the outputs of the adders.

Abstract: An adjustable delay circuit, for a logic input signal, comprises circuitry for charging a capacitance at a first constant current when the logic signal switches to a first logic state; circuitry for discharging the capacitance at a second constant current when the logic signal switches to the second logic state; circuitry for stopping charging and discharging of the capacitance between the moment when the voltage across the capacitance reaches a high threshold or a low threshold and a subsequent switching of the logic signal; and a first comparator connected to switch the state of an output signal when the voltage across the capacitance crosses a third threshold included between the first and second thresholds.

Abstract: An LED driver drives a plurality of light emitting diodes (LEDs) having first terminals connected to a common output stage and second terminals respectively receiving different, suitably rectified, phases of a sinusoidal signal. An output stage of the LED driver includes a first bipolar transistor coupled between a first supply terminal and the first terminals of the LED's. A first MOS transistor drives the base of the first bipolar transistor. The gate of the first MOS transistor is coupled to a first reference voltage. A second bipolar cascode transistor is connected in series with the first MOS transistor and biased by a second reference voltage such that the voltage across the first MOS transistor does not exceed a limit value.

Abstract: A differential transconductance amplifier includes two first NPN transistors, whose bases receive a differential input voltage, and whose collectors are coupled to a first supply voltage through two respective first current sources; two second NPN transistors respectively coupling the emitters of the first transistors to a second supply voltage, and whose bases are coupled to the collectors of the respective first transistors through level shifters; and a resistive means coupled between the emitters of the first transistors. Each level shifter includes a third PNP transistor coupled between the collector of the respective first transistor and the base of the respective second transistor, and whose control terminal receives a constant bias voltage independent of the differential input voltage.

Abstract: The present invention relates to a circuit for supplying the extremum voltage among several input voltages, including, for each input voltage, a first bipolar transistor, the base of which receives the input voltage and the emitter of which is connected to a common output supplying the extremum voltage; a first current source for biasing the emitter of the first transistor; and switching means for disconnecting the first source from the first transistor when this transistor is blocked.