Abstract: The disclosure relates to a method and a device for evaluating a signal. The signal is provided from a signal source via a signal conditioning unit to a microcontroller for signal evaluation. The method includes detecting the signal from the signal source and transmitting the signal to the signal conditioning unit, which has an anti-aliasing filter. The method also includes filtering the signal by the anti-aliasing filter, which is set on the basis of the signal to be detected and providing the filtered signal to the microcontroller. The method also includes processing and evaluating the filtered signal in the microcontroller.

Abstract: A method assigns addresses from a master unit to a number of slave units. The slave units are connected to the master unit for the transmission of information. An address output of the master unit is connected to an address input of a first slave unit and the address output of an n-th slave unit is connected to the address input of an n+1-th slave unit. The slave units, when a first level is applied to their address input, set the level at their address output to the first level and change to the first, “non-addressed” state, in the event of a transition of the level at their address input from the first level to a second level, change to the “addressable” state, upon receiving an address from the master unit, check the received address for validity in the “addressable” state and, acknowledge the reception to the master unit.

Abstract: A method assigns addresses from a master unit to a number of slave units. The slave units are connected to the master unit for the transmission of information. An address output of the master unit is connected to an address input of a first slave unit and the address output of an n-th slave unit is connected to the address input of an n+1-th slave unit. The slave units, when a first level is applied to their address input, set the level at their address output to the first level and change to the first, “non-addressed” state, in the event of a transition of the level at their address input from the first level to a second level, change to the “addressable” state, upon receiving an address from the master unit, check the received address for validity in the “addressable” state and, acknowledge the reception to the master unit.

Abstract: An integrated circuit includes a reception port an address port, and a memory with a number of memory sections for storing activation information. The number of memory sections is equal to the number, encodable by the address port, of activatable integrated circuits that are operable over a common bus. A control unit is configured to compare the address encoded by the address port with an address received at the reception port. The control unit writes a defined bit pattern to the memory section associated with the address in the event of a positive comparison, and withholds transmission of a negative acknowledgement signal in the event of a negative comparison. The integrated circuit is configured to be activated by the defined bit pattern in the memory section that corresponds to the address defined at the address port, for communicating with a microprocessor connected to the integrated circuit via the common bus.

Abstract: An integrated circuit includes a reception port an address port, and a memory with a number of memory sections for storing activation information. The number of memory sections is equal to the number, encodable by the address port, of activatable integrated circuits that are operable over a common bus. A control unit is configured to compare the address encoded by the address port with an address received at the reception port. The control unit writes a defined bit pattern to the memory section associated with the address in the event of a positive comparison, and withholds transmission of a negative acknowledgement signal in the event of a negative comparison. The integrated circuit is configured to be activated by the defined bit pattern in the memory section that corresponds to the address defined at the address port, for communicating with a microprocessor connected to the integrated circuit via the common bus.

Abstract: An interface module has at least a configuration connection, a reset connection, a transmission connection and a reception connection. The interface module also has at least a first interface processing unit and a second interface processing unit which differs from the first interface processing unit and the connections of which can be connected to the connections of the interface module via a multiplexer. Only one set of interface connections needs to be provided on the interface module.

Abstract: An interface module has at least a configuration connection, a reset connection, a transmission connection and a reception connection. The interface module also has at least a first interface processing unit and a second interface processing unit which differs from the first interface processing unit and the connections of which can be connected to the connections of the interface module via a multiplexer. Only one set of interface connections needs to be provided on the interface module.

Abstract: For the processing of a knock sensor signal during the detection of knocking in a combustion engine, in order to allow for inexpensively designed, efficient, and accurate bandpass filtering, a signal processing device (10) has an analog filter (20), a sigma-delta modulator (30) designed for analog-digital conversion, a CIC filter (40) designed to decimate the sampling rate, and a digital filter (50).

Abstract: For the processing of a knock sensor signal during the detection of knocking in a combustion engine, in order to allow for inexpensively designed, efficient, and accurate bandpass filtering, a signal processing device (10) has an analog filter (20), a sigma-delta modulator (30) designed for analog-digital conversion, a CIC filter (40) designed to decimate the sampling rate, and a digital filter (50).