Abstract: The invention is related to the generation of an image data stream and the reconstruction of an image from an image data stream. The method for generating an image data stream comprises the steps of (a) assigning search regions in a reference image to source macro blocks of a current image; (b) determining in the search regions best matches and corresponding residuals and (c) encoding the determined residuals in a data stream. A further feature of the method is related to the fact that the processing order in at least one of the steps (b) and (c) depends on positions of the assigned search regions in the reference image. The variation in the processing order allows for more efficient determination of best matches at encoder side and/or reduced processing requirements at decoder side.

Abstract: Method for reserving isochronous resources in a wireless network comprising at least a wireless source device and a wireless sink device, said wireless network being based on a TDMA frame transmission scheme, said method comprising the steps of: providing an output plug in said wireless source device, said output plug being associated with an output plug register, wherein said output plug register defines a maximum amount of data output by said output plug during a wireless frame; reserving an amount of bandwidth corresponding to said maximum amount of data to be sent in a wireless frame with an isoehronous resource manager of the wireless network.

Abstract: A wireless extension of the IEEE 1394 bus where two clusters of 1394 devices are linked by a wireless bridge. The device clusters communicate without being bridge-aware. The wireless bridge provides for a bus reset isolation. The wireless extension including a buffer memory for storing self-identification packets in the 1394 interfaces of both boxes of the wireless bridge. With these buffer memories the self-identification packets of the bus stations in the other cluster can be collected and they can be read out during the self-configuration phase of the network after a bus reset when the bus grant is assigned to the box of the wireless bridge that is also connected to the bus where the bus reset has occurred. The physical layer block of the 1394 interface transmits artificial self-identification packets for all bus stations of the other cluster.

Abstract: The invention relates to retrieving a test block at a freely selectable position from a blockwise stored reference image. A method for retrieving a test block from a blockwise stored reference image is described. Said method comprises the steps of retrieving a reference block and generating from the reference block a first corona block. Then, the test block is composed using a subsection of the reference block and a subsection of the first corona block.

Abstract: Method for connecting an IEEE1394 remote device to a cluster of IEEE1394 devices through a wireless link comprising a first wireless device connected to the cluster and a second wireless device connected to the remote device, wherein the remote device and the first wireless device for a first wired bus and the device cluster and the second wireless device form a second wired bus. The method comprises the steps of, representing the remote device on the cluster through the first wireless device and representing the devices of the cluster to the remote device through the second wireless device, such that the remote device and the devices of the cluster function as if these devices were part of a single IEEE1394 bus.

Abstract: Specialized image processing circuitry is usually implemented in hardware in a massively parallel way as single instruction multiple data (SIMD) architectures. Known implementations suffer from the long and complicated connection paths between a processing element and the memory subsystem, and the resulting limitation of maximum operating frequency. An optimized architecture for image processing has processing elements that are arranged in a two-dimensional structure, and each processing element has a local storage containing a plurality of reference pixels that are not neighbors in the reference image. Instead, the reference pixels belong to different blocks of the reference image, which may vary for different encoding schemes.

Abstract: So-called LCH packets are defined in the Hiperlan Type 2 System for wire-free transmission of video and audio data streams. These LCH packets have a length of 54 data bytes. Furthermore, the Hiperlan/2 Standard provides for so-called ARQ messages to be sent back to the transmitter in an SCH packet in a QOS mode (Quality Of Service), in which all the LCH data packets must be confirmed by the receiver. Space for the LCH and SCH data packets must be provided in a buffer store in the Hiperlan/2 interface for each connection that is set up. When there is a possibility of several hundred connections having been set up, separate reservation of memory areas for LCH and SCH packets would involve considerable complexity for the memory organization. The invention proposes that only one common area be reserved for LCH and SCH packets in the buffer store. The section which is provided for each LCH package is of such a size that it corresponds to a value 2n where n?[0, 1, 2, 3, . . .

Abstract: The invention deals with a physical layer circuit for the IEEE1394 bus. Considered is a scenario where two clusters of 1394 devices are linked to each other by means of a wireless bridge. The devices of one cluster shall communicate with devices of the other cluster without being bridge aware. Under this scenario there are two different types of 1394 devices existing in each cluster. One device is a bridge portal and will have the bridge functionality. All the other 1394 devices in the cluster will not have the bridge functionality. As the device having the bridge functionality needs to have a specific buffer memory for buffering node-ID packets, usually there are two different types of physical layer circuits required for the different types of 1394 devices. The invention deals with the problem of how it can be realized to use in both different types of 1394 devices the same type of physical layer circuit. The invention solves the problem by means of configuration means in the physical layer circuit.

Abstract: A method for bit recovery in an asymmetric data channel, the method comprising the steps of: providing a non-linear equalization filter with two coefficient sets; using the non-linear equalization filter with a first coefficient set for compensating defects of a first type of transition between different storage states; and using the non-linear equalization filter with a second coefficient set for compensating defects of a second type of transition between different storage states.

Abstract: According to the IEEE1394 bus protocol, priority is given to isochronous data packets. Data transfer is done in transfer cycles under the control of a cycle master. It depends on the allocated bandwidth for isochronous data how much transport capacity is available in a transfer cycle. To managed the mixed data transfer in one cycle it is specified that the bus nodes not having isochronous data to transfer need to wait with their transmission requests until the end of the isochronous data transfers in the cycle indicated with a sub-action gap. The invention aims to improve the efficiency of data transport for the case that none of the bus nodes need to transfer isochronous data. The data link layer devices according to the invention includes means for checking whether isochronous data is to be transferred and if not they switch over to a no cycle master state, in which the local cycle synchronization events are ignored.

Abstract: A bit clock recovery apparatus for digital storage readout employing sync frames, where an oversampled readout signal is stored in memory, sync patterns are located in the signal using DSP means, distances of consecutive sync pattern locations are calculated, and bit clock is recovered from these distances and the knowledge about the data framing structure.

Abstract: The format of the transmission of isochronous data packets via the IEEE 1394 bus is defined in the IEC 61883 Standard. A bus packet used to transmit the data has a header at the beginning, which header describes the format of the bus packet. This is then followed by an isochronous data format header, which defines the data format of the useful data in the useful packet. The invention is concerned with the problem of compiling a bus packet for transmission via the 1394 bus. In the case of the invention, this is done in such a way that when the isochronous data transmission is set up, the isochronous data format header prescribed by the application is written both to a special register that is provided and to the buffer memory for the bus packets and the useful data are attached thereto. As a result, it is then possible that a data transmitting section has to take the data to be transmitted, including the isochronous data format header, only from the buffer memory.

Abstract: According to the IEEE1394 bus protocol, priority is given to isochronous data packets. Data transfer is done in transfer cycles under the control of a cycle master. It depends on the allocated bandwidth for isochronous data how much transport capacity is available in a transfer cycle. To managed the mixed data transfer in one cycle it is specified that the bus nodes not having isochronous data to transfer need to wait with their transmission requests until the end of the isochronous data transfers in the cycle indicated with a sub-action gap. The invention aims to improve the efficiency of data transport for the case that none of the bus nodes need to transfer isochronous data. The data link layer devices according to the invention includes means for checking whether isochronous data is to be transferred and if not they switch over to a no cycle master state, in which the local cycle synchronization events are ignored.

Abstract: Advanced Video Coding uses intra prediction for 4*4 pixel blocks whereby reconstructed samples from adjacent pixel blocks are used to predict a current block. Nine different intra prediction modes are available in AVC. In order to save bits for signalling the prediction modes, a flag and a 3-bit parameter are used. If this flag is set the most probable prediction mode, which is calculated from previous predictions, is used by the encoder and the decoder to reconstruct the actual prediction mode. If the flag is cleared, the 3-bit parameter is sent to select the prediction mode independently. According to the invention, the flag is applied more frequently, based on a prediction error threshold, instead of applying the optimum prediction mode for a current pixel block.

Abstract: During the transmission of data packets received on a wired connection via a first interface (e.g. IEEE 1394 interface) via a second interface designed for the wireless transmission of data, e.g. HIPERLAN/2 interface, the problem exists that between receiving the data and transmitting the data via the second interface a relatively large delay time can arise which must be bridged by means of a suitably dimensioned buffer memory. The invention provides means that enable the maximum delay time to be further reduced. For this purpose, according to the invention, the necessary processing of the received IEEE 1394 bus packets is already performed section by section immediately after a received data packet has arrived. After the complete number of bus packets falling within a transmission frame has been received, there is therefore no longer any lengthy processing time required and the probability of missing the time slots reserved in the next transmission frame is significantly reduced.

Abstract: The invention deals with a physical layer circuit for the IEEE1394 bus. Considered is a scenario where two clusters of 1394 devices are linked to each other by means of a wireless bridge. The devices of one cluster shall communicate with devices of the other cluster without being bridge aware. Under this scenario there are two different types of 1394 devices existing in each cluster. One device is a bridge portal and will have the bridge functionality. All the other 1394 devices in the cluster will not have the bridge functionality. As the device having the bridge functionality needs to have a specific buffer memory for buffering node-ID packets, usually there are two different types of physical layer circuits required for the different types of 1394 devices. The invention deals with the problem of how it can be realized to use in both different types of 1394 devices the same type of physical layer circuit. The invention solves the problem by means of configuration means in the physical layer circuit.

Abstract: So-called LCH packets are defined in the Hiperlan Type 2 System for wire-free transmission of video and audio data streams. These LCH packets have a length of 54 data bytes. Furthermore, the Hiperlan/2 Standard provides for so-called ARQ messages to be sent back to the transmitter in an SCH packet in a QOS mode (Quality Of Service), in which all the LCH data packets must be confirmed by the receiver. Space for the LCH and SCH data packets must be provided in a buffer store in the Hiperlan/2 interface for each connection that is set up. When there is a possibility of several hundred connections having been set up, separate reservation of memory areas for LCH and SCH packets would involve considerable complexity for the memory organization. The invention proposes that only one common area be reserved for LCH and SCH packets in the buffer store. The section which is provided for each LCH package is of such a size that it corresponds to a value 2n where n&egr;[0, 1, 2, 3, . . .

Abstract: A method for bit recovery in an asymmetric data channel, the method comprising the steps of: providing a non-linear equalization filter with two coefficient sets; using the non-linear equalization filter with a first coefficient set for compensating defects of a first type of transition between different storage states; and using the non-linear equalization filter with a second coefficient set for compensating defects of a second type of transition between different storage states.

Abstract: The invention relates to a way of implementing the so-called “late” check according to IEC 61883 in a link layer IC for the IEEE 1394 Serial Bus in a way which is favourable in terms of expenditure. According to the invention, a specific time model is used which, during the checking of the up-to-dateness of a data packet by comparison with the current bus time, also substantially simplifies the necessary comparison operations by virtue of the fact that it is possible to represent only sections of the time axis by means of a data word with limited bit length.

Abstract: The invention relates to a method for operating a network of interface nodes (3), in particular IEEE 1394 interface nodes, and to an interface device for carrying out the method. In the network, interface nodes (3) are connected via a data bus (1). At least one of the interface nodes (3) in each case receives self-ID information from others of the interface nodes (3), with the self-ID information comprising self-ID data. The at least one of the interface nodes (3) forms joint information with joint header data and joint ID data for the self-ID information which has been received from the others of the interface nodes (3), and writes the joint information to a memory device in the at least one of the interface nodes (3).