Abstract: A fast, flexible hardware comparator is implemented using read-write memory chips (RAMs). Characteristic data is stored at a specific address corresponding to the reference value, which can be read out only in case of agreement when addressed by the actual value. To reduce the addresses to be decoded in the RAMs, the required address lines are evenly distributed among several RAMs. The present invention can be used as an address comparator in software testing, and as a reference/actual value comparator in digital control circuits, if the address difference from the reference value address in each case is additionally stored in the RAMs.