Abstract: A method of monitoring a process of powering an electronic device through a cable assembly is proposed. The cable assembly comprises a cable which is connected between a power supply and the electronic device. The method comprises generating a synchronization signal, generating a test signal based on the synchronization signal and applying the test signal to one end of the cable, detecting a response signal at the one end of the cable, the response signal resulting from applying the test signal to the cable assembly, and determining, based on the response signal and the synchronization signal, a first and a second quantity indicative of a real part and an imaginary part of the impedance of the cable assembly, respectively. Further, an apparatus for monitoring a process of powering an electronic device through a cable assembly is proposed.

Abstract: A method of monitoring a process of powering an electronic device through a cable assembly is proposed. The cable assembly comprises a cable which is connected between a power supply and the electronic device. The method comprises generating a synchronization signal, generating a test signal based on the synchronization signal and applying the test signal to one end of the cable, detecting a response signal at the one end of the cable, the response signal resulting from applying the test signal to the cable assembly, and determining, based on the response signal and the synchronization signal, a first and a second quantity indicative of a real part and an imaginary part of the impedance of the cable assembly, respectively. Further, an apparatus for monitoring a process of powering an electronic device through a cable assembly is proposed.

Abstract: This application relates a method and a control circuit for determining a charge current of a battery connected to a modulated load, wherein a current limited power source is connected in parallel to the modulated load and the battery for supplying a load dependent current up to a predetermined current limit to the modulated load and the battery. The control circuit comprises means for measuring a current flowing through the battery; means for indicating an overload condition of the current limited power source; and means for determining the charge current of the battery. The means for indicating an overload condition are configured to indicate an overload condition when a sum of a current drawn by the modulated load and a current flowing into the battery exceeds the predetermined current limit of the current limited power source.

Abstract: This application relates a method and a control circuit for determining a charge current of a battery connected to a modulated load, wherein a current limited power source is connected in parallel to the modulated load and the battery for supplying a load dependent current up to a predetermined current limit to the modulated load and the battery. The control circuit comprises means for measuring a current flowing through the battery; means for indicating an overload condition of the current limited power source; and means for determining the charge current of the battery. The means for indicating an overload condition are configured to indicate an overload condition when a sum of a current drawn by the modulated load and a current flowing into the battery exceeds the predetermined current limit of the current limited power source.

Abstract: Current regulators and related method for regulating a current through a load. The current regulator may include, for example, a first circuit configured to determine an amount of current that flows through the load; and a second circuit configured to cause a voltage to be applied across the load, the voltage having a duty cycle that depends on the amount of the current flowing through the load.

Abstract: An embodiment of the invention relates to a controller that includes a delta-sigma modulator to produce a one-bit, oversampled signal representing a measured characteristic of a process, and a delta-sigma modulator to produce a one-bit, oversampled signal representing a set-point value for the characteristic. A multiplexer selects a partial sum based on a difference of the oversampled signals to produce a control signal for the process. The controller that produces the control signal for the process can be a PID controller.

Abstract: An embodiment of the invention relates to a controller that includes a delta-sigma modulator to produce a one-bit, oversampled signal representing a measured characteristic of a process, and a delta-sigma modulator to produce a one-bit, oversampled signal representing a set-point value for the characteristic. A multiplexer selects a partial sum based on a difference of the oversampled signals to produce a control signal for the process. The controller that produces the control signal for the process can be a PID controller.

Abstract: Current regulators and related methods for regulating a current through a load. The current regulator may include, for example, a first circuit configured to determine an amount of current that flows through the load; and a second circuit configured to cause a voltage to be applied across the load, the voltage having a duty cycle that depends on the amount of the current flowing through the load.

Abstract: A digital phase-locked loop is provided having a minimal transient recovery time for emitting an output clock signal which is synchronous with a reference clock signal in a normal operating state of the digital phase-locked loop. The phase-locked loop can include a phase detector for identifying a phase deviation between the reference clock signal and a feedback clock signal. Further, the phase-locked loop can include a resettable counter, which generates a digital phase deviation signal corresponding to the identified phase deviation. The phase-locked loop can also include a resettable digital filter for filtering the digital phase deviation signal. Further, the phase-locked loop can include an oscillator circuit for generating the output clock signal as a function of a filtered digital phase deviation signal. The phase-locked loop can also include a resettable feedback frequency divider which divides the output clock signal for generating the feedback clock signal.

Abstract: The invention relates to a digital phase-locked loop having a minimal transient recovery time for transient recovery to a reset state.