Abstract: A battery management communication system comprising: a control unit configured to receive information from each of a plurality of battery cells, and generate instructions to control the battery cells; a plurality of segment communication units comprising at least a first and a second segment communication unit; the first segment communication unit is configured to provide for communication between the control unit and a first cell group; and wherein the second segment communication unit is configured to provide for communication between the control unit and a second cell group; and a main communication unit configured to couple to the control unit and the plurality of segment communication units; wherein said information and instructions are routed through the main communication unit and appropriate segment communication unit.

Abstract: Provided in a reception device (10) for receiving a transmission signal (US) in which, adhering to a communications protocol, reception data (ED) can be transmitted to the reception device (10) from a transmission device (2, 3) are reception means (12) for receiving the transmission signal (US), and evaluation means (16) for evaluating the received transmission signal (US) and for emitting a bit sequence (BFT) received in the transmission signal (US), which bit sequence (BFT) may contain bits of reception data (ED) transmitted from the transmission device (2, 3) but also bits (SB) occasioned by an interference to the transmission signal (US), and checking means (18) for checking whether the received bit sequence (BFT) infringes a rule of the communications protocol, wherein the reception device (10) is designed to continue with the reception of the transmission signal (US) and the checking of the received bit sequence (BFT) following the occurrence of an infringement of the communications protocol.

Abstract: Provided in a reception device (10) for receiving a transmission signal (US) in which, adhering to a communications protocol, reception data (ED) can be transmitted to the reception device (10) from a transmission device (2, 3) are reception means (12) for receiving the transmission signal (US), and evaluation means (16) for evaluating the received transmission signal (US) and for emitting a bit sequence (BFT) received in the transmission signal (US), which bit sequence (BFT) may contain bits of reception data (ED) transmitted from the transmission device (2, 3) but also bits (SB) occasioned by an interference to the transmission signal (US), and checking means (18) for checking whether the received bit sequence (BFT) infringes a rule of the communications protocol, wherein the reception device (10) is designed to continue with the reception of the transmission signal (US) and the checking of the received bit sequence (BFT) following the occurrence of an infringement of the communications protocol.

Abstract: A data processing device (1) which includes a circuit (2) with data processing means (17) which are suitable for processing data (DA) while utilizing a characteristic value (CV) and with sequencing means (15) which are arranged to execute an algorithm in order to control the data processing means (17) in conformity with this algorithm which comprises a given number N of sub-algorithms containing identical successions of algorithm steps, is additionally provided with order fixation means (29) which co-operate with the sequencing means (15) and whereby, each time when the algorithm is executed, an order can be fixed from a plurality of feasible orders for the execution of the N sub-algorithms.

Abstract: A data carrier that communicates confidential data is configured to mask process-dependent power consumption by using power stored in an internal capacitor. The capacitor is initially charged to the voltage of an external power source, and then decoupled from the external power source. The capacitor provides power to an internal processor, and consequently discharges gradually. At the end of a given time interval, the capacitor is discharged to a fixed voltage, then charged to the supply voltage. In this manner the power consumed by charging of the capacitor is decoupled from the power consumed by the processor. If the capacitor drops below a threshold voltage before processing is completed, the processor is halted. To optimize the available processing time, the time interval before discharging the capacitor to the fixed voltage is dynamically adjusted to reduce the time that the processor is halted.

Abstract: A data carrier (4) for the transfer of communication data (KD1, KD2) via at least two interface means (11, 12), having first interface means (11) for receiving a first communication signal (KS1), and having second interface means (12) for receiving a second communication signal (KS2), and having processing means (13) to which a first clock signal (TS1) derived from the first communication signal (KS1) or a second clock signal (TS2) derived from the second communication signal (KS2) can be applied for the processing of the transferred communication data (KD1, KD2), and having reset means (21) for resetting the processing by the processing means (13), now includes a first frequency sensor (22) which is adapted to supply first frequency reset information (RI4) to the reset means (21) when a first clock frequency of the first clock signal (TS1) or the frequency (FKS1) of the first communication signal (KS1) lies below a first lower frequency threshold (FU1), and includes a second frequency sensor (23) which is ad

Abstract: A data carrier (1) includes a chip (10) having a supply voltage circuit point (12), from which a supply voltage (V) can be taken, and having at least one supply voltage output (21, 22) for supplying a supply voltage (V1, V2), and having potential control means (35, 49) to which a control signal (S) can be applied and with the aid of which the supply voltage output (21, 22) can be set to different potential values in accordance with the control signal (S), and also includes at least one component (24, 29) which is spatially separated from the chip (10), which component (24, 29) has a supply voltage input (25, 30) is connected to the supply voltage output (21, 22) of the chip (10) via a connection lead (27, 32).

Abstract: A data carrier (4) for the contactless communication of communication information (KD) with a transmitting/receiving station (1) includes receiving circuit (7) for receiving an HF signal (HF) containing the communication information (KD) from the transmitting/receiving station (1), and processing circuit (10) for processing the received communication information (KD), and supply voltage generating circuit (13) for rectifying the received HF signal (HF) and for energizing the processing circuit (10) with a supply voltage (UV), and reset circuit (14) for resetting, when the supply voltage (UV) decreases below a reset voltage value (UR), the processing performed by the processing circuit (10), the reset circuit (14) now being adapted to interrupt the processing of the communication information (KD) by the processing circuit (10) at least partially when the supply voltage (UV) decreases below an interruption voltage value (UU), the interruption voltage value (UU) being greater than the reset voltage value (UR).

Abstract: An output stage (22; 26; 29) of a data carrier (2; 25; 28), which output stage is connected to a communication contact (9), said data carrier being adapted to provide contactless communication via an antenna stage (13) and contact-bound communication via the communication contact (9), includes a first transistor (T1; T4) having a first control terminal (G1; G4), a first input terminal (S1; D4) and a first output terminal (D1; S4), and a second transistor (T2) having a second control terminal (G2), a second input terminal (D2) and a second output terminal (S2), and a control stage (23; 31) for supplying first control information (SI1) to the first control terminal (G1), in order to drive the first transistor (T1; T4) into its conductive state, and for supplying second control information (SI2) to the second control terminal (G2), in order to drive the second transistor (T2) into its conductive state, in which stage an internal supply voltage (VINT), derived from an antenna signal (HF) by a power supply (15) of

Abstract: A data carrier is disclosed for the communication of transmission information to a communication station. In particular, the data carrier includes a program memory for storing a program code including instruction and address information in at least one program code line, a data memory for storing data information, and a processor for processing the communicated transmission information, wherein each program code line address mode information included in the instruction information and the associated address information can be determined/processed to access a memory location of the program or data memory, and includes an address mode extension device, which in the presence of specific address information, determines stored additional address mode information.

Abstract: In order to prevent the retrieval of data via the measurement of the power consumption in a data carrier provided with a data processing device, it is proposed to connect a load circuit to the power supply of the data carrier so as to influence the power consumption of the data carrier at least during security-relevant operations of the data processing device.

Abstract: An output stage (22; 26; 29) of a data carrier (2; 25; 28), which output stage is connected to a communication contact (9), said data carrier being adapted to provide contactless communication via an antenna stage (13) and contact-bound communication via the communication contact (9), includes a first transistor (T1; T4) having a first control terminal (G1; G4), a first input terminal (S1; D4) and a first output terminal (D1; S4), and a second transistor (T2) having a second control terminal (G2), a second input terminal (D2) and a second output terminal (S2), and a control stage (23; 31) for supplying first control information (SI1) to the first control terminal (G1), in order to drive the first transistor (T1; T4) into its conductive state, and for supplying second control information (SI2) to the second control terminal (G2), in order to drive the second transistor (T2) into its conductive state, in which stage an internal supply voltage (VINT), derived from an antenna signal (HF) by power supply means (15

Abstract: A data carrier (4) for the transfer of communication data (KD1, KD2) via at least two interface means (11, 12), having first interface means (11) for receiving a first communication signal (KS1), and having second interface means (12) for receiving a second communication signal (KS2), and having processing means (13) to which a first clock signal (TS1) derived from the first communication signal (KS1) or a second clock signal (TS2) derived from the second communication signal (KS2) can be applied for the processing of the transferred communication data (KD1, KD2), and having reset means (21) for resetting the processing by the processing means (13), now includes a first frequency sensor (22) which is adapted to supply first frequency reset information (RI4) to the reset means (21) when a first clock frequency of the first clock signal (TS1) or the frequency (FKS1) of the first communication signal (KS1) lies below a first lower frequency threshold (FU1), and includes a second frequency sensor (23) which is ad

Abstract: In a data carrier (2) for the communication of communication data (KD1, KD2) with a base station, having processing means (4) for the processing of communicated communication data (KD1, KD2), and having voltage supply means (5) which are arranged to receive an external supply voltage (UEXT) applied to the data carrier during a charging time interval (TL) until a turn-on instant (te1, te2, te3) and which are adapted to supply an internal supply voltage (UINT) to the processing means (4), decoupled from the external supply voltage (UEXT), during a consumption time interval (TV1, TV2, TV3) starting at the turn-on instant (te1, te2, te3), the processing means (4) being adapted to interrupt the processing from an interruption instant (tu1, tu2, tu3), when the internal supply voltage (UINT) decreases below a threshold voltage (US), till the turn-on instant (te1, te2, te3), time measurement means (12) are now provided, which time measurement means are adapted to measure a processing time interval (TP1, TP2, TP3) def

Abstract: A data carrier (1) includes a chip (10) having a supply voltage circuit point (12), from which a supply voltage (V) can be taken, and having at least one supply voltage output (21, 22) for supplying a supply voltage (V1, V2), and having potential control means (35, 49) to which a control signal (S) can be applied and with the aid of which the supply voltage output (21, 22) can be set to different potential values in accordance with the control signal (S), and also includes at least one component (24, 29) which is spatially separated from the chip (10), which component (24, 29) has a supply voltage input (25, 30) for receiving the supply voltage (V1, V2), which the supply voltage input (25, 30) is connected to the supply voltage output (21, 22) of the chip (10) via a connection lead (27, 32).

Abstract: A data carrier (4) for the contactless communication of communication information (KD) with a transmitting/receiving station (1) includes receiving means (7) for receiving an HF signal (HF) containing the communication information (KD) from the transmitting/receiving station (1), and processing means (10) for processing the received communication information (KD), and supply voltage generating means (13) for rectifying the received HF signal (HF) and for energizing the processing means (10) with a supply voltage (UV), and reset means (14) for resetting, when the supply voltage (UV) decreases below a reset voltage value (UR), the processing performed by the processing means (10), the reset means (14) now being adapted to interrupt the processing of the communication information (KD) by the processing means (10) at least partially when the supply voltage (UV) decreases below an interruption voltage value (UU), the interruption voltage value (UU) being greater than the reset voltage value (UR).

Abstract: A data carrier (1) for the communication of transmission information (UI) to communication station (2), including program memory means (9) for the storage of a program code (PC) including instruction information (II) and associated address information (AI) in at least one program code line (PCZ), and including data memory means (10) for the storage of data information (DI) and including computing means (8) for the execution of the stored program code (PC) in order to process the communicated transmission information (UI), where for each program code line (PCZ) address mode information (AAI) included in the instruction information (II) and the associated address information (AI) can be determined and can be processed in order to access a memory location of the program memory means (9) or the data memory means (10), now includes address mode extension means (12), which in the presence of specific address information (AI) are adapted to determine stored additional address mode information (ZAAI) which identifies