Abstract: Embodiments of the invention relate generally to an integrated circuit and a memory module. In an embodiment of the invention, an integrated circuit is provided. The integrated circuit may include a semiconductor carrier including at least one electrically inactive region on an upper surface thereof, a passivation layer structure disposed above the upper surface of the semiconductor carrier, and at least one lithographic trench in the passivation layer structure above the at least one electrically inactive region on the upper surface of the semiconductor carrier.

Abstract: Embodiments of the invention relate to a semiconductor, a semiconductor module and to a method for manufacturing a semiconductor module. In an embodiment of the invention, an integrated circuit includes a plurality of connection pads on at least one side of the integrated circuit, which connection pads can be coupled electrically conductingly by means of a respective bond wire, wherein in at least an edge area on the side of the integrated circuit, on which the connection pads are arranged, a support frame portion is arranged which is configured such that bond wires adjacent to each other can be supported on the support frame portion at a distance from each other.

Abstract: An FBGA semiconductor component has a chip side for receiving a semiconductor chip, a solder ball side for applying solder balls on ball pads, and a bonding channel embodied as an opening between the chip side and the solder ball side and serving for leading through wire bridges between the semiconductor chip and bonding islands on the solder ball side. The bonding channel has side areas extending between the chip side and the solder ball side and can be closed off with a housing part comprising potting composition. Positively locking elements for a potting composition are arranged in that region of the substrate in which the housing part is produced.

Abstract: The inventive method is based on the a idea of releasing a mechanical connection between the semiconductor chip and the supporting substrate during the manufacturing of the packing. The mechanical connection required for producing the electrical contacts between the semiconductor chip and the supporting substrate ensues only temporarily. As a result, a critical interface in the packing is removed thereby resulting in distinctly reducing the thermomechanical stresses.

Abstract: A method produces semiconductor components having a substrate, a semiconductor chip and an encapsulant. Chips situated on a wafer are singulated, arranged on a substrate and electrically conductively connected to a conductor structure on the substrate. The chips on the substrate are encapsulated with an encapsulant and the semiconductor components are singulated by sawing up the encapsulant.

Abstract: Manufacturing method for an electronic component assembly and corresponding electronic component assembly The present invention provides a manufacturing method for an electronic component assembly and to a corresponding electronic component assembly.

Abstract: In a method for producing an integrated component, a carrier strip is provided with at least one arrangement of chips. A casting mold is placed over the carrier strip in such a way that the arrangement of chips is covered completely by at least one cavity of the casting mold. A protective layer is formed over the arrangement of microchips by filling the cavity with a liquefied encapsulating compound. The liquefied encapsulating compound transforms into a solid state upon cooling. The carrier strip with the protective layer can be ejected from the cavity by exerting a force onto a surface of the protective layer facing the cavity. The force is exerted onto at least one linearly extended surface region of the protective layer.

Abstract: A substrate for producing a soldering connection to a second substrate is disclosed. Soldering pads are distributed on the substrate surface. Solder balls can be applied to these pads. A soldering pad has a top side area and side areas connected to a conductor track. A soldering mask with openings in the region of the soldering pads is applied to the substrate. A soldering pad is provided with holding mechanism for the solder balls in such a way that, within the top side area of the soldering pad, a depression is introduced in the direction of the substrate or an elevation rising above the top side area is applied.

Abstract: The inventive method is based on the a idea of releasing a mechanical connection between the semiconductor chip and the supporting substrate during the manufacturing of the packing. The mechanical connection required for producing the electrical contacts between the semiconductor chip and the supporting substrate ensues only temporarily. As a result, a critical interface in the packing is removed thereby resulting in distinctly reducing the thermomechanical stresses.

Abstract: A semiconductor component includes a substrate having a chip side and a solder ball side. A semiconductor chip is mounted on the chip side of a substrate. The semiconductor chip is electrically conductively connected to a conductor structure on the substrate. Ball pads are disposed over the solder ball side of the substrate. The ball pads are electrically conductively connected to the conductor structure and suitable for application of solder balls. A mask made from a soldering resist is disposed on the solder ball side. A sealing region at a surface of the solder ball side of the substrate is provided with seal elements for a sealing connection to an encapsulation mold on the surface of the solder ball side.

Abstract: An FBGA semiconductor component has a chip side for receiving a semiconductor chip, a solder ball side for applying solder balls on ball pads, and a bonding channel embodied as an opening between the chip side and the solder ball side and serving for leading through wire bridges between the semiconductor chip and bonding islands on the solder ball side. The bonding channel has side areas extending between the chip side and the solder ball side and can be closed off with a housing part comprising potting composition. Positively locking elements for a potting composition are arranged in that region of the substrate in which the housing part is produced.

Abstract: Support matrices for semiconductors are often encapsulated in a region of the bonding leads, the so-called bonding channel. The encapsulation is effected using a dispensable material that can flow onto the support matrix and causes contamination there. In order to prevent this flow, the support matrix for integrated semiconductors has a frame, conductor track structures and at least one bonding channel. In the bonding channel bonding leads or wires for connecting the conductor track structures to the integrated semiconductor are disposed. Disposed along the edge of the bonding channel a barrier for preventing the flow of flowable material from the bonding channel onto the frame and/or the conductor track structures. A method for producing such support matrices is likewise disclosed.

Abstract: A leadframe of a conductive material includes a central region to accommodate a chip and a plurality of connecting fingers extending at least from one side in the direction of the central region, a contact region being provided adjacent to the central region on at least some of the connecting fingers. The course of the connecting fingers is such that a sectional face in an arbitrary imaginary cross-section at right angles to the main face of the leadframe has leadframe material. In such a case, it is attempted to keep cross-sections in a component without leadframe material as small as possible.

Abstract: A supporting structure for a chip includes a supporting substrate with a bond opening therein and an interconnect layer on the supporting substrate. In the interconnect layer, a bonding channel overlapping with the bond opening is formed. The supporting structure further includes an escape prevention structure for the bonding channel to enable escaping of air from the bonding channel and to prevent the encapsulation material from escaping from the bonding channel on introducing encapsulation material into the bonding channel after the applying of a chip to the supporting structure.

Abstract: The invention relates to a packaging for a semiconductor chip. A frame that directly surrounds the slot is provide on the carrier board on the side of the nubbins. Said frame is provided with the same height as the nubbins and the slot and the frame surrounding said slot are at least partially filled with a casting compound which is preferably adapted to the thermal expansion coefficients of the semiconductor chip.

Abstract: The invention relates to a method of marking substandard parts on system carriers for chip mounting. The invention is intended to provide a method of marking substandard parts in which, without special effort, a permanent marking that can easily be detected by an optical recognition system and having adequate contrast can be produced, and in which the occurrence of the stamp effect is reliably avoided. According to the invention, for the marking of substandard parts on the system carrier, use is made of a permanent, non-detachable BUM marking the appearance of which is distinct from the surrounds. This can be carried out by removing material from the surface of the system carrier or by means of a deposition method. Other possibilities exist by means of applying heat at a point or chemical marking. so that a locally limited, permanent appearance, e.g. color change of the substrate close to the surface or of the metal deposited on the said substrate is effected in the area of the BUM marking.

Abstract: Support matrices for semiconductors are often disposed with spacers on the semiconductor chip. The spacers are composed of silicone that flows into the region of the bonding leads and prevents reliable electrical connection of the bonding leads to the semiconductor chip. In order to prevent the flow, the support matrix for integrated semiconductors has a frame, conductor track structures and at least one bonding lead for connecting the conductor track structures to the integrated semiconductor. The bonding lead has, between a bonding region and the conductor track structures, at least one barrier for preventing the flow of flowable material onto the bonding region. A method for producing such support matrices is likewise described.

Abstract: A leadframe of a conductive material includes a central region to accommodate a chip and a plurality of connecting fingers extending at least from one side in the direction of the central region, a contact region being provided adjacent to the central region on at least some of the connecting fingers. The course of the connecting fingers is such that a sectional face in an arbitrary imaginary cross-section at right angles to the main face of the leadframe has leadframe material. In such a case, it is attempted to keep cross-sections in a component without leadframe material as small as possible.

Abstract: Support matrices for semiconductors are often disposed with spacers on the semiconductor chip. The spacers are composed of silicone that flows into the region of the bonding leads and prevents reliable electrical connection of the bonding leads to the semiconductor chip. In order to prevent the flow, the support matrix for integrated semiconductors has a frame, conductor track structures and at least one bonding lead for connecting the conductor track structures to the integrated semiconductor. The bonding lead has, between a bonding region and the conductor track structures, at least one barrier for preventing the flow of flowable material onto the bonding region. A method for producing such support matrices is likewise described.

Abstract: Support matrices for semiconductors are often encapsulated in a region of the bonding leads, the so-called bonding channel. The encapsulation is effected using a dispensable material that can flow onto the support matrix and causes contamination there. In order to prevent this flow, the support matrix for integrated semiconductors has a frame, conductor track structures and at least one bonding channel. In the bonding channel bonding leads or wires for connecting the conductor track structures to the integrated semiconductor are disposed. Disposed along the edge of the bonding channel a barrier for preventing the flow of flowable material from the bonding channel onto the frame and/or the conductor track structures. A method for producing such support matrices is likewise disclosed.