Abstract: The present disclosure describes a method of forming low thermal budget dielectrics in semiconductor devices. The method includes forming, on a substrate, first and second fin structures with an opening in between, filling the opening with a flowable isolation material, treating the flowable isolation material with a plasma, and removing a portion of the plasma-treated flowable isolation material between the first and second fin structures.

Abstract: A method is provided for forming a semiconductor device. A fin feature is formed on a semiconductor substrate, and a dummy gate feature is formed over the fin feature. The fin feature includes a sacrificial portion disposed over the semiconductor substrate, and a fin portion disposed over the sacrificial portion. The dummy gate feature is connected to the fin feature and the semiconductor substrate. Then, the sacrificial portion is removed to form a gap between the semiconductor substrate and the fin portion. A dielectric isolation layer is formed to fill the gap for electrically isolating the fin portion from the semiconductor substrate. Subsequently, source/drain features are formed over the dielectric isolation layer, and the dummy gate feature is processed to form a gate electrode feature on the fin portion.

Abstract: The present disclosure is directed to a method for the fabrication of isolation structures between source/drain (S/D) epitaxial structures of stacked transistor structures. The method includes depositing an oxygen-free dielectric material in an opening over a first epitaxial structure, where the oxygen-free dielectric material covers top surfaces of the first epitaxial structure and sidewall surfaces of the opening. The method also includes exposing the oxygen-free dielectric material to an oxidizing process to oxidize the oxygen-free dielectric material so that the oxidizing process does not oxidize a portion of the oxygen-free dielectric material on the first epitaxial structure. Further, etching the oxidized oxygen-free dielectric material and forming a second epitaxial layer on the oxygen-free dielectric material not removed by the etching to substantially fill the opening.

Abstract: The present disclosure is directed to a method for the fabrication of isolation structures between source/drain (S/D)) epitaxial structures of stacked transistor structures. The method includes depositing an oxygen-free dielectric material in an opening over a first epitaxial structure, where the oxygen-free dielectric material covers top surfaces of the first epitaxial structure and sidewall surfaces of the opening. The method also includes exposing the oxygen-free dielectric material to an oxidizing process to oxidize the oxygen-free dielectric material so that the oxidizing process does not oxidize a portion of the oxygen-free dielectric material on the first epitaxial structure. Further, etching the oxidized oxygen-free dielectric material and forming a second epitaxial layer on the oxygen-free dielectric material not removed by the etching to substantially the opening.

Abstract: The present disclosure describes a semiconductor device that includes nanostructures on a substrate and a source/drain region in contact with the nanostructures. The source/drain region includes (i) a first epitaxial structure embedded in the substrate; (ii) a nitride layer on the first epitaxial structure; and a second epitaxial structure on the first epitaxial structure. The semiconductor device also includes a gate structure formed on the nanostructures.

Abstract: A semiconductor structure includes a semiconductor substrate and an isolation structure disposed in the semiconductor substrate, wherein the isolation structure includes a first dielectric layer in contact with the semiconductor substrate and a second dielectric layer over the first dielectric layer, wherein the first dielectric layer is between the second dielectric layer and the semiconductor substrate, the first dielectric layer comprises a bottom portion and a sidewall portion, and a thickness of the bottom portion is greater than a thickness of the sidewall portion.

Abstract: A semiconductor device with different configurations of contact structures and a method of fabricating the same are disclosed. The method includes forming first and second fin structures on a substrate, forming n- and p-type source/drain (S/D) regions on the first and second fin structures, respectively, forming first and second contact openings on the n- and p-type S/D regions, respectively, forming a carbon-based layer in the first and second contact openings, performing a remote plasma treatment with radicals on the carbon-based layer to form a remote plasma treated layer, selectively removing a portion of the remote plasma treated layer, forming a p-type work function metal (pWFM) silicide layer on the p-type S/D region, and forming an n-type work function metal (nWFM) silicide layer on the pWFM silicide layer and on the n-type S/D region.

Abstract: A semiconductor device with densified dielectric structures and a method of fabricating the same are disclosed. The method includes forming a fin structure, forming an isolation structure adjacent to the fin structure, forming a source/drain (S/D) region on the fin structure, depositing a flowable dielectric layer on the isolation structure, converting the flowable dielectric layer into a non-flowable dielectric layer, performing a densification process on the non-flowable dielectric layer, and repeating the depositing, converting, and performing to form a stack of densified dielectric layers surrounding the S/D region.

Abstract: The present disclosure describes a semiconductor structure and a method for forming the same. The semiconductor structure can include a substrate, first and second contact structures proximate to each other and over the substrate, and first and second dielectric layers formed over the first and second contact structures, respectively. A top portion of the first dielectric layer can include a first dielectric material. A bottom portion of the first dielectric layer can include a second dielectric material different from the first dielectric material. The second dielectric layer can include a third dielectric material different from the first dielectric material.

Abstract: The present disclosure describes a method of forming low thermal budget dielectrics in semiconductor devices.

Abstract: The present disclosure is directed to a method for the fabrication of isolation structures between source/drain (S/D)) epitaxial structures of stacked transistor structures. The method includes depositing an oxygen-free dielectric material in an opening over a first epitaxial structure, where the oxygen-free dielectric material covers top surfaces of the first epitaxial structure and sidewall surfaces of the opening. The method also includes exposing the oxygen-free dielectric material to an oxidizing process to oxidize the oxygen-free dielectric material so that the oxidizing process does not oxidize a portion of the oxygen-free dielectric material on the first epitaxial structure. Further, etching the oxidized oxygen-free dielectric material and forming a second epitaxial layer on the oxygen-free dielectric material not removed by the etching to substantially the opening.

Abstract: Efficient algorithms for estimating LSFCs with no aid of SSFCs by taking advantage of the channel hardening effect and large spatial samples available to a massive MIMO base station (BS) are proposed. The LSFC estimates are of low computational complexity and require relatively small training overhead. In the uplink direction, mobile stations (MSs) transmit orthogonal uplink pilots for the serving BS to estimate LSFCs. In the downlink direction, the BS transmits either pilot signal or data signal intended to the MSs that have already established time and frequency synchronization. The proposed uplink and downlink LSFC estimators are unbiased and asymptotically optimal as the number of BS antennas tends to infinity.

Abstract: A method includes performing an etching on a mask layer to form an opening in the mask layer. The mask layer is a part of a wafer. The method further includes measuring a lateral size of the opening, comparing the lateral size of the opening with a specified range, and performing a compensation etch to compensate for a difference between the lateral size and the specified range. After the compensation etch, a target layer of the wafer is etched to extend the opening into the target layer.

Abstract: A carrier and a packing case using the same for a portable electronic device having a rear surface and a side surface are provided, wherein the carrier comprises a rear plate, a frame and at least a supporting component. The rear plate has a first inner surface fitting the rear surface and a first outer surface opposite thereto, and the frame surrounds the rear plate and has a second inner surface fitting the side surface and a second outer surface respectively surrounding the first inner and outer surfaces. The supporting component is pivoted to the first and/or second outer surfaces. The supporting component can be received in the frame by being rotated toward the rear plate and attached on the first outer surface, and support the portable electronic device to stand up by being rotated away from the rear plate and extended out of the frame.

Abstract: A method includes performing an etching on a mask layer to form an opening in the mask layer. The mask layer is a part of a wafer. The method further includes measuring a lateral size of the opening, comparing the lateral size of the opening with a specified range, and performing a compensation etch to compensate for a difference between the lateral size and the specified range. After the compensation etch, a target layer of the wafer is etched to extend the opening into the target layer.

Abstract: Efficient algorithms for estimating LSFCs with no aid of SSFCs by taking advantage of the channel hardening effect and large spatial samples available to a massive MIMO base station (BS) are proposed. The LSFC estimates are of low computational complexity and require relatively small training overhead. In the uplink direction, mobile stations (MSs) transmit orthogonal uplink pilots for the serving BS to estimate LSFCs. In the downlink direction, the BS transmits either pilot signal or data signal intended to the MSs that have already established time and frequency synchronization. The proposed uplink and downlink LSFC estimators are unbiased and asymptotically optimal as the number of BS antennas tends to infinity.

Abstract: The present invention discloses a keyboard module capable of supporting a portable electronic device. The keyboard module includes a keyboard base and a supporting mechanism, and the supporting mechanism is disposed on the keyboard base. A containing space is formed inside the supporting mechanism, and the supporting mechanism includes at least one track and a supporting device. The at least one track is disposed in the containing space, and the supporting device is slidably disposed inside the containing space. The supporting device slides along the at least one track to extend outside the containing space to a supporting position for supporting the portable electronic device.

Abstract: A carrier and a packing case using the same for a portable electronic device having a rear surface and a side surface are provided, wherein the carrier comprises a rear plate, a frame and at least a supporting component. The rear plate has a first inner surface fitting the rear surface and a first outer surface opposite thereto, and the frame surrounds the rear plate and has a second inner surface fitting the side surface and a second outer surface respectively surrounding the first inner and outer surfaces. The supporting component is pivoted to the first and/or second outer surfaces. The supporting component can be received in the frame by being rotated toward the rear plate and attached on the first outer surface, and support the portable electronic device to stand up by being rotated away from the rear plate and extended out of the frame.