Abstract: A mask, the layout thereon and the method therefore are provided. In one embodiment, a mask layout structure comprises a plurality of unit patterns, wherein each unit pattern comprises a plurality of angle portions, and each angle portion has an extending portion extended outwardly therefrom. The mask can be used for defining the pattern of the photoresist layer before the ion implantation process. The use of the make layout structure not only avoids the lifting of the photoresist layer in the ion implantation process, but also produces outstanding features in the field of power devices. The mask can be used in the fabrication of power devices, especially in the fabrication of sources of trench power devices.

Abstract: Embodiments of the present invention provide a developing method, which can efficiently prevent the developing solution from remaining on the backside surface of the wafer, so as to avoid the influence of the contamination on the subsequent processes. In one embodiment, a developing method comprises providing a wafer in a reaction space, wherein the wafer has an exposed photoresist thereon; coating a developing solution on a surface of the wafer; rotating the wafer; rinsing a normal surface and a backside surface of the wafer; and stopping rinsing the normal surface of the wafer while keeping rinsing the backside surface of the wafer for a specific time period.