Patents by Inventor Ko Yamanaga
Ko Yamanaga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10521533Abstract: An inductor simulation method and nonlinear equivalent circuit model enabling dynamic simulation of nonlinear characteristics when a direct current is superimposed with high precision. An equivalent circuit of an inductor is represented using a series circuit of passive circuit elements. Characteristic change ratios of the passive circuit elements when a direct current is superimposed are expressed as an approximate function on the basis of actually measured values. A reference current measured by each of voltage source models is referred to by a control voltage source connected in series to the passive circuit elements. The characteristic change ratios are calculated in accordance with the reference current Iref. Difference voltages are generated on the basis of the characteristic change ratios and voltages occurring when no direct current is superimposed, they are superimposed on the voltages VL1 and VR1 occurring when no direct current is superimposed, thereby simulating the nonlinear characteristics.Type: GrantFiled: November 9, 2015Date of Patent: December 31, 2019Assignee: Murata Manufacturing Co., Ltd.Inventors: Seiji Hidaka, Ko Yamanaga
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Patent number: 10120037Abstract: A power inductor evaluation apparatus includes a storage unit and a determination unit. The storage unit stores the simulation model of a DC-DC converter. The simulation model includes the equivalent circuit model of a power inductor, including a DC superimposition characteristics slope ? and a saturation current Isat as parameters. The determination unit inputs the DC superimposition characteristics slope ? and the saturation current Isat into the simulation model of the DC-DC converter and performs simulation, and determines whether or not the power inductor having the DC superimposition characteristics slope ? and the saturation current Isat is usable on the basis of whether or not the simulation results satisfy design requirements (e.g, a permissible ripple voltage and a peak current).Type: GrantFiled: January 28, 2016Date of Patent: November 6, 2018Assignee: Murata Manufacturing Co., Ltd.Inventor: Ko Yamanaga
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Patent number: 9871449Abstract: A two-phase DC/DC converter includes, as an inductor array, a pair of inductors to which a DC input voltage is alternately applied with a phase difference of about 180 degrees through switching control of switching devices. A duty ratio is substantially in a range from 5% to 40%, and a coupling factor between the inductors is substantially in a range from ?0.4 to ?0.1. With this configuration, ripple current in the inductors can be made to be smaller than in the case in which there is no coupling between the inductors even when the duty ratio considerably varies.Type: GrantFiled: May 28, 2015Date of Patent: January 16, 2018Assignee: Murata Manufacturing Co., Ltd.Inventors: Atsuo Hirukawa, Ko Yamanaga
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Publication number: 20160254747Abstract: A two-phase DC/DC converter includes, as an inductor array, a pair of inductors to which a DC input voltage is alternately applied with a phase difference of about 180 degrees through switching control of switching devices. A duty ratio is substantially in a range from 5% to 40%, and a coupling factor between the inductors is substantially in a range from ?0.4 to ?0.1. With this configuration, ripple current in the inductors can be made to be smaller than in the case in which there is no coupling between the inductors even when the duty ratio considerably varies.Type: ApplicationFiled: May 28, 2015Publication date: September 1, 2016Applicant: MURATA MANUFACTURING CO., LTD.Inventors: Atsuo HIRUKAWA, Ko YAMANAGA
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Publication number: 20160223619Abstract: A power inductor evaluation apparatus includes a storage unit and a determination unit. The storage unit stores the simulation model of a DC-DC converter. The simulation model includes the equivalent circuit model of a power inductor, including a DC superimposition characteristics slope ? and a saturation current Isat as parameters. The determination unit inputs the DC superimposition characteristics slope ? and the saturation current Isat into the simulation model of the DC-DC converter and performs simulation, and determines whether or not the power inductor having the DC superimposition characteristics slope ? and the saturation current Isat is usable on the basis of whether or not the simulation results satisfy design requirements (e.g, a permissible ripple voltage and a peak current).Type: ApplicationFiled: January 28, 2016Publication date: August 4, 2016Applicant: MURATA MANUFACTURING CO., LTD.Inventor: Ko YAMANAGA
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Publication number: 20160070837Abstract: An inductor simulation method and nonlinear equivalent circuit model enabling dynamic simulation of nonlinear characteristics when a direct current is superimposed with high precision. An equivalent circuit of an inductor is represented using a series circuit of passive circuit elements. Characteristic change ratios of the passive circuit elements when a direct current is superimposed are expressed as an approximate function on the basis of actually measured values. A reference current measured by each of voltage source models is referred to by a control voltage source connected in series to the passive circuit elements. The characteristic change ratios are calculated in accordance with the reference current Iref. Difference voltages are generated on the basis of the characteristic change ratios and voltages occurring when no direct current is superimposed, they are superimposed on the voltages VL1 and VR1 occurring when no direct current is superimposed, thereby simulating the nonlinear characteristics.Type: ApplicationFiled: November 9, 2015Publication date: March 10, 2016Applicant: MURATA MANUFACTURING CO., LTD.Inventors: Seiji HIDAKA, Ko YAMANAGA
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Patent number: 8030947Abstract: Second and third ports of a network analyzer are individually connected via cables to predetermined connection points on a differential transmission circuit on an object to be measured. A differential cable is connected to the differential transmission circuit. An antenna for receiving an electromagnetic wave radiated from the differential cable is connected to a first port of the network analyzer via a first cable. The network analyzer measures a three-port S parameter of the first, second, and third ports and calculates common-mode and normal-mode components of noise radiated from the differential cable. As a result, the source of noise in an electronic apparatus can be determined, and common-mode noise and normal-mode noise can be separately measured.Type: GrantFiled: October 16, 2009Date of Patent: October 4, 2011Assignee: Murata Manufacturing Co., Ltd.Inventors: Ko Yamanaga, Takahiro Azuma
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Publication number: 20100026316Abstract: Second and third ports of a network analyzer are individually connected via cables to predetermined connection points on a differential transmission circuit on an object to be measured. A differential cable is connected to the differential transmission circuit. An antenna for receiving an electromagnetic wave radiated from the differential cable is connected to a first port of the network analyzer via a first cable. The network analyzer measures a three-port S parameter of the first, second, and third ports and calculates common-mode and normal-mode components of noise radiated from the differential cable. As a result, the source of noise in an electronic apparatus can be determined, and common-mode noise and normal-mode noise can be separately measured.Type: ApplicationFiled: October 16, 2009Publication date: February 4, 2010Applicant: MURATA MANUFACTURING CO., LTD.Inventors: Ko Yamanaga, Takahiro Azuma
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Patent number: 7345555Abstract: A wiring pattern structure having differential transmission paths electrically connects an integrated circuit element and a connector, which are arranged on a printed wiring board. Each of the differential transmission paths includes a pair of first and second signal lines. The first and second signal lines are substantially hook-shaped and a substantially rectangular area is formed between the first and second signal lines. First and second electrostatic protection elements are disposed in the substantially rectangular area. A bent portion of each of the first and second signal lines may be rounded.Type: GrantFiled: September 8, 2005Date of Patent: March 18, 2008Assignee: Murata Manufacturing Co., Ltd.Inventors: Ko Yamanaga, Hiroshi Tanaka
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Publication number: 20060066417Abstract: A wiring pattern structure having differential transmission paths electrically connects an integrated circuit element and a connector, which are arranged on a printed wiring board. Each of the differential transmission paths includes a pair of first and second signal lines. The first and second signal lines are substantially hook-shaped and a substantially rectangular area is formed between the first and second signal lines. First and second electrostatic protection elements are disposed in the substantially rectangular area. A bent portion of each of the first and second signal lines may be rounded.Type: ApplicationFiled: September 8, 2005Publication date: March 30, 2006Inventors: Ko Yamanaga, Hiroshi Tanaka